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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH 25/47] target/arm: Use tcg_constant for vector shift expanders
Date: Tue, 26 Apr 2022 09:30:21 -0700	[thread overview]
Message-ID: <20220426163043.100432-26-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220426163043.100432-1-richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/translate.c | 27 +++++++++------------------
 1 file changed, 9 insertions(+), 18 deletions(-)

diff --git a/target/arm/translate.c b/target/arm/translate.c
index 2e4165be3d..9539d2e8ca 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -2996,9 +2996,8 @@ void gen_gvec_sqrdmlsh_qc(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs,
     }                                                                   \
     static void gen_##NAME##0_vec(unsigned vece, TCGv_vec d, TCGv_vec a) \
     {                                                                   \
-        TCGv_vec zero = tcg_const_zeros_vec_matching(d);                \
+        TCGv_vec zero = tcg_constant_vec_matching(d, vece, 0);          \
         tcg_gen_cmp_vec(COND, vece, d, a, zero);                        \
-        tcg_temp_free_vec(zero);                                        \
     }                                                                   \
     void gen_gvec_##NAME##0(unsigned vece, uint32_t d, uint32_t m,      \
                             uint32_t opr_sz, uint32_t max_sz)           \
@@ -3988,8 +3987,8 @@ void gen_ushl_i32(TCGv_i32 dst, TCGv_i32 src, TCGv_i32 shift)
     TCGv_i32 rval = tcg_temp_new_i32();
     TCGv_i32 lsh = tcg_temp_new_i32();
     TCGv_i32 rsh = tcg_temp_new_i32();
-    TCGv_i32 zero = tcg_const_i32(0);
-    TCGv_i32 max = tcg_const_i32(32);
+    TCGv_i32 zero = tcg_constant_i32(0);
+    TCGv_i32 max = tcg_constant_i32(32);
 
     /*
      * Rely on the TCG guarantee that out of range shifts produce
@@ -4007,8 +4006,6 @@ void gen_ushl_i32(TCGv_i32 dst, TCGv_i32 src, TCGv_i32 shift)
     tcg_temp_free_i32(rval);
     tcg_temp_free_i32(lsh);
     tcg_temp_free_i32(rsh);
-    tcg_temp_free_i32(zero);
-    tcg_temp_free_i32(max);
 }
 
 void gen_ushl_i64(TCGv_i64 dst, TCGv_i64 src, TCGv_i64 shift)
@@ -4017,8 +4014,8 @@ void gen_ushl_i64(TCGv_i64 dst, TCGv_i64 src, TCGv_i64 shift)
     TCGv_i64 rval = tcg_temp_new_i64();
     TCGv_i64 lsh = tcg_temp_new_i64();
     TCGv_i64 rsh = tcg_temp_new_i64();
-    TCGv_i64 zero = tcg_const_i64(0);
-    TCGv_i64 max = tcg_const_i64(64);
+    TCGv_i64 zero = tcg_constant_i64(0);
+    TCGv_i64 max = tcg_constant_i64(64);
 
     /*
      * Rely on the TCG guarantee that out of range shifts produce
@@ -4036,8 +4033,6 @@ void gen_ushl_i64(TCGv_i64 dst, TCGv_i64 src, TCGv_i64 shift)
     tcg_temp_free_i64(rval);
     tcg_temp_free_i64(lsh);
     tcg_temp_free_i64(rsh);
-    tcg_temp_free_i64(zero);
-    tcg_temp_free_i64(max);
 }
 
 static void gen_ushl_vec(unsigned vece, TCGv_vec dst,
@@ -4132,8 +4127,8 @@ void gen_sshl_i32(TCGv_i32 dst, TCGv_i32 src, TCGv_i32 shift)
     TCGv_i32 rval = tcg_temp_new_i32();
     TCGv_i32 lsh = tcg_temp_new_i32();
     TCGv_i32 rsh = tcg_temp_new_i32();
-    TCGv_i32 zero = tcg_const_i32(0);
-    TCGv_i32 max = tcg_const_i32(31);
+    TCGv_i32 zero = tcg_constant_i32(0);
+    TCGv_i32 max = tcg_constant_i32(31);
 
     /*
      * Rely on the TCG guarantee that out of range shifts produce
@@ -4152,8 +4147,6 @@ void gen_sshl_i32(TCGv_i32 dst, TCGv_i32 src, TCGv_i32 shift)
     tcg_temp_free_i32(rval);
     tcg_temp_free_i32(lsh);
     tcg_temp_free_i32(rsh);
-    tcg_temp_free_i32(zero);
-    tcg_temp_free_i32(max);
 }
 
 void gen_sshl_i64(TCGv_i64 dst, TCGv_i64 src, TCGv_i64 shift)
@@ -4162,8 +4155,8 @@ void gen_sshl_i64(TCGv_i64 dst, TCGv_i64 src, TCGv_i64 shift)
     TCGv_i64 rval = tcg_temp_new_i64();
     TCGv_i64 lsh = tcg_temp_new_i64();
     TCGv_i64 rsh = tcg_temp_new_i64();
-    TCGv_i64 zero = tcg_const_i64(0);
-    TCGv_i64 max = tcg_const_i64(63);
+    TCGv_i64 zero = tcg_constant_i64(0);
+    TCGv_i64 max = tcg_constant_i64(63);
 
     /*
      * Rely on the TCG guarantee that out of range shifts produce
@@ -4182,8 +4175,6 @@ void gen_sshl_i64(TCGv_i64 dst, TCGv_i64 src, TCGv_i64 shift)
     tcg_temp_free_i64(rval);
     tcg_temp_free_i64(lsh);
     tcg_temp_free_i64(rsh);
-    tcg_temp_free_i64(zero);
-    tcg_temp_free_i64(max);
 }
 
 static void gen_sshl_vec(unsigned vece, TCGv_vec dst,
-- 
2.34.1



  parent reply	other threads:[~2022-04-26 16:54 UTC|newest]

Thread overview: 97+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-26 16:29 [PATCH 00/47] target/arm: Use tcg_constant Richard Henderson
2022-04-26 16:29 ` [PATCH 01/47] target/arm: Use tcg_constant in gen_probe_access Richard Henderson
2022-04-28  9:36   ` Peter Maydell
2022-04-26 16:29 ` [PATCH 02/47] target/arm: Use tcg_constant in gen_mte_check* Richard Henderson
2022-04-28  9:36   ` Peter Maydell
2022-04-26 16:29 ` [PATCH 03/47] target/arm: Use tcg_constant in gen_exception* Richard Henderson
2022-04-28  9:37   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 04/47] target/arm: Use tcg_constant in gen_adc_CC Richard Henderson
2022-04-28  9:39   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 05/47] target/arm: Use tcg_constant in handle_msr_i Richard Henderson
2022-04-28  9:39   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 06/47] target/arm: Use tcg_constant in handle_sys Richard Henderson
2022-04-28  9:41   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 07/47] target/arm: Use tcg_constant in disas_exc Richard Henderson
2022-04-28  9:41   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 08/47] target/arm: Use tcg_constant in gen_compare_and_swap_pair Richard Henderson
2022-04-28  9:43   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 09/47] target/arm: Use tcg_constant in disas_ld_lit Richard Henderson
2022-04-28  9:45   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 10/47] target/arm: Use tcg_constant in disas_ldst_* Richard Henderson
2022-04-28  9:45   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 11/47] target/arm: Use tcg_constant in disas_add_sum_imm* Richard Henderson
2022-04-28  9:59   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 12/47] target/arm: Use tcg_constant in disas_movw_imm Richard Henderson
2022-04-28  9:59   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 13/47] target/arm: Use tcg_constant in shift_reg_imm Richard Henderson
2022-04-28  9:59   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 14/47] target/arm: Use tcg_constant in disas_cond_select Richard Henderson
2022-04-28 10:00   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 15/47] target/arm: Use tcg_constant in handle_{rev16,crc32} Richard Henderson
2022-04-28 10:00   ` [PATCH 15/47] target/arm: Use tcg_constant in handle_{rev16, crc32} Peter Maydell
2022-04-26 16:30 ` [PATCH 16/47] target/arm: Use tcg_constant in disas_data_proc_2src Richard Henderson
2022-04-28 10:01   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 17/47] target/arm: Use tcg_constant in disas_fp* Richard Henderson
2022-04-28 10:06   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 18/47] target/arm: Use tcg_constant in simd shift expanders Richard Henderson
2022-04-28 10:09   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 19/47] target/arm: Use tcg_constant in simd fp/int conversion Richard Henderson
2022-04-28 10:10   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 20/47] target/arm: Use tcg_constant in 2misc expanders Richard Henderson
2022-04-28 10:11   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 21/47] target/arm: Use tcg_constant in balance of translate-a64.c Richard Henderson
2022-04-28 10:12   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 22/47] target/arm: Use tcg_constant for aa32 exceptions Richard Henderson
2022-04-28 10:21   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 23/47] target/arm: Use tcg_constant for disas_iwmmxt_insn Richard Henderson
2022-04-28 10:23   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 24/47] target/arm: Use tcg_constant for gen_{msr,mrs} Richard Henderson
2022-04-28 10:24   ` Peter Maydell
2022-04-26 16:30 ` Richard Henderson [this message]
2022-04-28 10:25   ` [PATCH 25/47] target/arm: Use tcg_constant for vector shift expanders Peter Maydell
2022-04-26 16:30 ` [PATCH 26/47] target/arm: Use tcg_constant for do_coproc_insn Richard Henderson
2022-04-28 10:27   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 27/47] target/arm: Use tcg_constant for gen_srs Richard Henderson
2022-04-28 10:29   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 28/47] target/arm: Use tcg_constant for op_s_{rri,rxi}_rot Richard Henderson
2022-04-28 10:29   ` [PATCH 28/47] target/arm: Use tcg_constant for op_s_{rri, rxi}_rot Peter Maydell
2022-04-26 16:30 ` [PATCH 29/47] target/arm: Use tcg_constant for MOVW, UMAAL, CRC32 Richard Henderson
2022-04-28 10:30   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 30/47] target/arm: Use tcg_constant for v7m MRS, MSR Richard Henderson
2022-04-28 10:31   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 31/47] target/arm: Use tcg_constant for TT, SAT, SMMLA Richard Henderson
2022-04-28 10:37   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 32/47] target/arm: Use tcg_constant in LDM, STM Richard Henderson
2022-04-28 10:37   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 33/47] target/arm: Use tcg_constant in CLRM, DLS, WLS, LE Richard Henderson
2022-04-28 10:38   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 34/47] target/arm: Use tcg_constant in trans_CPS_v7m Richard Henderson
2022-04-28 10:39   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 35/47] target/arm: Use tcg_constant in trans_CSEL Richard Henderson
2022-04-28 10:39   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 36/47] target/arm: Use tcg_constant for trans_INDEX_* Richard Henderson
2022-04-28 10:40   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 37/47] target/arm: Use tcg_constant in SINCDEC, INCDEC Richard Henderson
2022-04-28 10:41   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 38/47] target/arm: Use tcg_constant in FCPY, CPY Richard Henderson
2022-04-28 10:41   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 39/47] target/arm: Use tcg_constant in {incr, wrap}_last_active Richard Henderson
2022-04-28 10:42   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 40/47] target/arm: Use tcg_constant in do_clast_scalar Richard Henderson
2022-04-28 10:42   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 41/47] target/arm: Use tcg_constant in WHILE Richard Henderson
2022-04-28 10:46   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 42/47] target/arm: Use tcg_constant in LD1, ST1 Richard Henderson
2022-04-28 10:46   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 43/47] target/arm: Use tcg_constant in SUBR Richard Henderson
2022-04-28 10:47   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 44/47] target/arm: Use tcg_constant in do_zzi_{sat, ool}, do_fp_imm Richard Henderson
2022-04-28 10:48   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 45/47] target/arm: Use tcg_constant for predicate descriptors Richard Henderson
2022-04-28 10:49   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 46/47] target/arm: Use tcg_constant for do_brk{2,3} Richard Henderson
2022-04-28 10:52   ` Peter Maydell
2022-04-26 16:30 ` [PATCH 47/47] target/arm: Use tcg_constant for vector descriptor Richard Henderson
2022-04-28 10:54   ` Peter Maydell
2022-04-28 12:38 ` [PATCH 00/47] target/arm: Use tcg_constant Peter Maydell
2022-04-28 15:20   ` Richard Henderson

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