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From: Max Filippov <jcmvbkbc@gmail.com>
To: qemu-devel@nongnu.org
Cc: Max Filippov <jcmvbkbc@gmail.com>
Subject: [PATCH 4/7] tests/tcg/xtensa: remove dependency on the loop option
Date: Wed, 27 Apr 2022 10:21:37 -0700	[thread overview]
Message-ID: <20220427172140.1406059-5-jcmvbkbc@gmail.com> (raw)
In-Reply-To: <20220427172140.1406059-1-jcmvbkbc@gmail.com>

xtensa core may not have the loop option, but still have timers. Don't
use loop opcode in the timer test.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
 tests/tcg/xtensa/test_timer.S | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/tests/tcg/xtensa/test_timer.S b/tests/tcg/xtensa/test_timer.S
index 1ec8e20883ff..2a383e77190e 100644
--- a/tests/tcg/xtensa/test_timer.S
+++ b/tests/tcg/xtensa/test_timer.S
@@ -115,9 +115,9 @@ test ccompare0_interrupt
     movi    a2, 1 << XCHAL_TIMER0_INTERRUPT
     wsr     a2, intenable
     rsil    a2, 0
-    loop    a3, 1f
-    nop
 1:
+    addi    a3, a3, -1
+    bnez    a3, 1b
     test_fail
 2:
     rsr     a2, exccause
@@ -148,9 +148,9 @@ test ccompare1_interrupt
     movi    a2, 1 << XCHAL_TIMER1_INTERRUPT
     wsr     a2, intenable
     rsil    a2, INTERRUPT_LEVEL(XCHAL_TIMER1_INTERRUPT) - 1
-    loop    a3, 1f
-    nop
 1:
+    addi    a3, a3, -1
+    bnez    a3, 1b
     test_fail
 2:
 test_end
@@ -177,9 +177,9 @@ test ccompare2_interrupt
     movi    a2, 1 << XCHAL_TIMER2_INTERRUPT
     wsr     a2, intenable
     rsil    a2, INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT) - 1
-    loop    a3, 1f
-    nop
 1:
+    addi    a3, a3, -1
+    bnez    a3, 1b
     test_fail
 2:
 test_end
@@ -197,7 +197,7 @@ test ccompare_interrupt_masked
     wsr     a2, ccompare2
 #endif
 
-    movi    a3, 2 * WAIT_LOOPS
+    movi    a3, WAIT_LOOPS
     make_ccount_delta a2, a15
 #if XCHAL_NUM_TIMERS > 1
     wsr     a2, ccompare1
@@ -211,9 +211,10 @@ test ccompare_interrupt_masked
     movi    a2, 1 << XCHAL_TIMER0_INTERRUPT
     wsr     a2, intenable
     rsil    a2, 0
-    loop    a3, 1f
-    nop
 1:
+    addi    a3, a3, -1
+    bnez    a3, 1b
+
     test_fail
 2:
     rsr     a2, exccause
@@ -231,7 +232,6 @@ test ccompare_interrupt_masked_waiti
     wsr     a2, ccompare2
 #endif
 
-    movi    a3, 2 * WAIT_LOOPS
     make_ccount_delta a2, a15
 #if XCHAL_NUM_TIMERS > 1
     wsr     a2, ccompare1
-- 
2.30.2



  parent reply	other threads:[~2022-04-27 17:23 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-27 17:21 [PATCH 0/7] tests/tcg/xtensa: test fixes and improvements Max Filippov
2022-04-27 17:21 ` [PATCH 1/7] tests/tcg/xtensa: fix build for cores without windowed registers Max Filippov
2022-04-27 17:21 ` [PATCH 2/7] tests/tcg/xtensa: restore vecbase SR after test Max Filippov
2022-04-27 17:21 ` [PATCH 3/7] tests/tcg/xtensa: fix watchpoint test Max Filippov
2022-04-27 17:21 ` Max Filippov [this message]
2022-04-27 17:21 ` [PATCH 5/7] tests/tcg/xtensa: enable autorefill phys_mem tests for MMUv3 Max Filippov
2022-04-27 17:21 ` [PATCH 6/7] tests/tcg/xtensa: enable mmu " Max Filippov
2022-04-27 17:21 ` [PATCH 7/7] tests/tcg/xtensa: fix vectors and checks in timer test Max Filippov

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