[PATCH v2 71/74] target/rx: Consolidate exception helpers

[Richard Henderson <richard.henderson@linaro.org>]

Replace 5 helpers with 1.  Store pc before raising
privileged and undefined instruction exceptions,
which means we don't need to use tcg unwinding.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/rx/helper.h    |  6 +-----
 target/rx/op_helper.c | 25 ++++---------------------
 target/rx/translate.c | 23 +++++++++++------------
 3 files changed, 16 insertions(+), 38 deletions(-)

diff --git a/target/rx/helper.h b/target/rx/helper.h
index ebb4739474..e6763b5a90 100644
--- a/target/rx/helper.h
+++ b/target/rx/helper.h
@@ -1,9 +1,5 @@
-DEF_HELPER_1(raise_illegal_instruction, noreturn, env)
-DEF_HELPER_1(raise_access_fault, noreturn, env)
-DEF_HELPER_1(raise_privilege_violation, noreturn, env)
+DEF_HELPER_2(raise_exception, noreturn, env, i32)
 DEF_HELPER_1(wait, noreturn, env)
-DEF_HELPER_2(rxint, noreturn, env, i32)
-DEF_HELPER_1(rxbrk, noreturn, env)
 DEF_HELPER_FLAGS_3(fadd, TCG_CALL_NO_WG, f32, env, f32, f32)
 DEF_HELPER_FLAGS_3(fsub, TCG_CALL_NO_WG, f32, env, f32, f32)
 DEF_HELPER_FLAGS_3(fmul, TCG_CALL_NO_WG, f32, env, f32, f32)
diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c
index 6ab7b070bd..f2b58bcad5 100644
--- a/target/rx/op_helper.c
+++ b/target/rx/op_helper.c
@@ -428,19 +428,12 @@ void raise_exception(CPURXState *env, int index, uintptr_t retaddr)
     cpu_loop_exit_restore(cs, retaddr);
 }
 
-G_NORETURN void helper_raise_privilege_violation(CPURXState *env)
+G_NORETURN void helper_raise_exception(CPURXState *env, uint32_t index)
 {
-    raise_exception(env, EXCP_PRIVILEGED, GETPC());
-}
+    CPUState *cs = env_cpu(env);
 
-G_NORETURN void helper_raise_access_fault(CPURXState *env)
-{
-    raise_exception(env, EXCP_ACCESS, GETPC());
-}
-
-G_NORETURN void helper_raise_illegal_instruction(CPURXState *env)
-{
-    raise_exception(env, EXCP_UNDEFINED, GETPC());
+    cs->exception_index = index;
+    cpu_loop_exit(cs);
 }
 
 G_NORETURN void helper_wait(CPURXState *env)
@@ -452,13 +445,3 @@ G_NORETURN void helper_wait(CPURXState *env)
     env->psw_i = 1;
     raise_exception(env, EXCP_HLT, 0);
 }
-
-G_NORETURN void helper_rxint(CPURXState *env, uint32_t vec)
-{
-    raise_exception(env, EXCP_INTB_0 + vec, 0);
-}
-
-G_NORETURN void helper_rxbrk(CPURXState *env)
-{
-    raise_exception(env, EXCP_INTB_0, 0);
-}
diff --git a/target/rx/translate.c b/target/rx/translate.c
index 62aee66937..ddf31afb11 100644
--- a/target/rx/translate.c
+++ b/target/rx/translate.c
@@ -156,6 +156,13 @@ static void gen_goto_tb(DisasContext *dc, int n, target_ulong dest)
     dc->base.is_jmp = DISAS_NORETURN;
 }
 
+static void gen_raise_exception(DisasContext *ctx, int vec, bool advance_pc)
+{
+    tcg_gen_movi_i32(cpu_pc, advance_pc ? ctx->base.pc_next : ctx->pc);
+    gen_helper_raise_exception(cpu_env, tcg_constant_i32(vec));
+    ctx->base.is_jmp = DISAS_NORETURN;
+}
+
 /* generic load wrapper */
 static inline void rx_gen_ld(unsigned int size, TCGv reg, TCGv mem)
 {
@@ -234,7 +241,7 @@ static int is_privileged(DisasContext *ctx, int is_exception)
 {
     if (FIELD_EX32(ctx->tb_flags, PSW, PM)) {
         if (is_exception) {
-            gen_helper_raise_privilege_violation(cpu_env);
+            gen_raise_exception(ctx, EXCP_PRIVILEGED, false);
         }
         return 0;
     } else {
@@ -2261,23 +2268,15 @@ static bool trans_RTE(DisasContext *ctx, arg_RTE *a)
 /* brk */
 static bool trans_BRK(DisasContext *ctx, arg_BRK *a)
 {
-    tcg_gen_movi_i32(cpu_pc, ctx->base.pc_next);
-    gen_helper_rxbrk(cpu_env);
-    ctx->base.is_jmp = DISAS_NORETURN;
+    gen_raise_exception(ctx, EXCP_INTB_0, true);
     return true;
 }
 
 /* int #imm */
 static bool trans_INT(DisasContext *ctx, arg_INT *a)
 {
-    TCGv vec;
-
     tcg_debug_assert(a->imm < 0x100);
-    vec = tcg_const_i32(a->imm);
-    tcg_gen_movi_i32(cpu_pc, ctx->base.pc_next);
-    gen_helper_rxint(cpu_env, vec);
-    tcg_temp_free(vec);
-    ctx->base.is_jmp = DISAS_NORETURN;
+    gen_raise_exception(ctx, EXCP_INTB_0 + a->imm, true);
     return true;
 }
 
@@ -2318,7 +2317,7 @@ static void rx_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
     ctx->pc = ctx->base.pc_next;
     insn = decode_load(ctx);
     if (!decode(ctx, insn)) {
-        gen_helper_raise_illegal_instruction(cpu_env);
+        gen_raise_exception(ctx, EXCP_UNDEFINED, false);
     }
 }
 
-- 
2.34.1