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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 13/23] target/arm: Merge allocation of the cpreg and its name
Date: Thu,  5 May 2022 10:11:37 +0100	[thread overview]
Message-ID: <20220505091147.2657652-14-peter.maydell@linaro.org> (raw)
In-Reply-To: <20220505091147.2657652-1-peter.maydell@linaro.org>

From: Richard Henderson <richard.henderson@linaro.org>

Simplify freeing cp_regs hash table entries by using a single
allocation for the entire value.

This fixes a theoretical bug if we were to ever free the entire
hash table, because we've been installing string literal constants
into the cpreg structure in define_arm_vh_e2h_redirects_aliases.
However, at present we only free entries created for AArch32
wildcard cpregs which get overwritten by more specific cpregs,
so this bug is never exposed.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220501055028.646596-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/cpu.c    | 16 +---------------
 target/arm/helper.c | 10 ++++++++--
 2 files changed, 9 insertions(+), 17 deletions(-)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 602c060fff7..01176b2569f 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1071,27 +1071,13 @@ uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz)
     return (Aff1 << ARM_AFF1_SHIFT) | Aff0;
 }
 
-static void cpreg_hashtable_data_destroy(gpointer data)
-{
-    /*
-     * Destroy function for cpu->cp_regs hashtable data entries.
-     * We must free the name string because it was g_strdup()ed in
-     * add_cpreg_to_hashtable(). It's OK to cast away the 'const'
-     * from r->name because we know we definitely allocated it.
-     */
-    ARMCPRegInfo *r = data;
-
-    g_free((void *)r->name);
-    g_free(r);
-}
-
 static void arm_cpu_initfn(Object *obj)
 {
     ARMCPU *cpu = ARM_CPU(obj);
 
     cpu_set_cpustate_pointers(cpu);
     cpu->cp_regs = g_hash_table_new_full(g_direct_hash, g_direct_equal,
-                                         NULL, cpreg_hashtable_data_destroy);
+                                         NULL, g_free);
 
     QLIST_INIT(&cpu->pre_el_change_hooks);
     QLIST_INIT(&cpu->el_change_hooks);
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 2bc81dbc5ec..d92fd23445b 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8506,11 +8506,17 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, const ARMCPRegInfo *r,
      * add a single reginfo struct to the hash table.
      */
     uint32_t key;
-    ARMCPRegInfo *r2 = g_memdup(r, sizeof(ARMCPRegInfo));
+    ARMCPRegInfo *r2;
     int is64 = (r->type & ARM_CP_64BIT) ? 1 : 0;
     int ns = (secstate & ARM_CP_SECSTATE_NS) ? 1 : 0;
+    size_t name_len;
+
+    /* Combine cpreg and name into one allocation. */
+    name_len = strlen(name) + 1;
+    r2 = g_malloc(sizeof(*r2) + name_len);
+    *r2 = *r;
+    r2->name = memcpy(r2 + 1, name, name_len);
 
-    r2->name = g_strdup(name);
     /* Reset the secure state to the specific incoming state.  This is
      * necessary as the register may have been defined with both states.
      */
-- 
2.25.1



  parent reply	other threads:[~2022-05-05 10:29 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-05  9:11 [PULL 00/23] target-arm queue Peter Maydell
2022-05-05  9:11 ` [PULL 01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user Peter Maydell
2022-05-05  9:11 ` [PULL 02/23] target/arm: Split out cpregs.h Peter Maydell
2022-05-05  9:11 ` [PULL 03/23] target/arm: Reorg CPAccessResult and access_check_cp_reg Peter Maydell
2022-05-05  9:11 ` [PULL 04/23] target/arm: Replace sentinels with ARRAY_SIZE in cpregs.h Peter Maydell
2022-05-05  9:11 ` [PULL 05/23] target/arm: Make some more cpreg data static const Peter Maydell
2022-05-05  9:11 ` [PULL 06/23] target/arm: Reorg ARMCPRegInfo type field bits Peter Maydell
2022-05-05  9:11 ` [PULL 07/23] target/arm: Avoid bare abort() or assert(0) Peter Maydell
2022-05-05  9:11 ` [PULL 08/23] target/arm: Change cpreg access permissions to enum Peter Maydell
2022-05-05  9:11 ` [PULL 09/23] target/arm: Name CPState type Peter Maydell
2022-05-05  9:11 ` [PULL 10/23] target/arm: Name CPSecureState type Peter Maydell
2022-05-05  9:11 ` [PULL 11/23] target/arm: Drop always-true test in define_arm_vh_e2h_redirects_aliases Peter Maydell
2022-05-05  9:11 ` [PULL 12/23] target/arm: Store cpregs key in the hash table directly Peter Maydell
2022-05-05  9:11 ` Peter Maydell [this message]
2022-05-05  9:11 ` [PULL 14/23] target/arm: Hoist computation of key in add_cpreg_to_hashtable Peter Maydell
2022-05-05  9:11 ` [PULL 15/23] target/arm: Consolidate cpreg updates " Peter Maydell
2022-05-05  9:11 ` [PULL 16/23] target/arm: Use bool for is64 and ns " Peter Maydell
2022-05-05  9:11 ` [PULL 17/23] target/arm: Hoist isbanked computation " Peter Maydell
2022-05-05  9:11 ` [PULL 18/23] target/arm: Perform override check early " Peter Maydell
2022-05-05  9:11 ` [PULL 19/23] target/arm: Reformat comments " Peter Maydell
2022-05-05  9:11 ` [PULL 20/23] target/arm: Remove HOST_BIG_ENDIAN ifdef " Peter Maydell
2022-05-05  9:11 ` [PULL 21/23] target/arm: Add isar predicates for FEAT_Debugv8p2 Peter Maydell
2022-05-05  9:11 ` [PULL 22/23] target/arm: Add isar_feature_{aa64,any}_ras Peter Maydell
2022-05-05  9:11 ` [PULL 23/23] target/arm: read access to performance counters from EL0 Peter Maydell
2022-05-05 17:56 ` [PULL 00/23] target-arm queue Richard Henderson

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