From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 07/23] target/arm: Avoid bare abort() or assert(0)
Date: Thu, 5 May 2022 10:11:31 +0100 [thread overview]
Message-ID: <20220505091147.2657652-8-peter.maydell@linaro.org> (raw)
In-Reply-To: <20220505091147.2657652-1-peter.maydell@linaro.org>
From: Richard Henderson <richard.henderson@linaro.org>
Standardize on g_assert_not_reached() for "should not happen".
Retain abort() when preceeded by fprintf or error_report.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220501055028.646596-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.c | 7 +++----
target/arm/hvf/hvf.c | 2 +-
target/arm/kvm-stub.c | 4 ++--
target/arm/kvm.c | 4 ++--
target/arm/machine.c | 4 ++--
target/arm/translate-a64.c | 4 ++--
target/arm/translate-neon.c | 2 +-
target/arm/translate.c | 4 ++--
8 files changed, 15 insertions(+), 16 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index f84377babe1..06f8864c778 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8740,8 +8740,7 @@ void define_one_arm_cp_reg_with_opaque(ARMCPU *cpu,
break;
default:
/* broken reginfo with out-of-range opc1 */
- assert(false);
- break;
+ g_assert_not_reached();
}
/* assert our permissions are not too lax (stricter is fine) */
assert((r->access & ~mask) == 0);
@@ -10823,7 +10822,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
break;
default:
/* Never happens, but compiler isn't smart enough to tell. */
- abort();
+ g_assert_not_reached();
}
}
*prot = ap_to_rw_prot(env, mmu_idx, ap, domain_prot);
@@ -10944,7 +10943,7 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address,
break;
default:
/* Never happens, but compiler isn't smart enough to tell. */
- abort();
+ g_assert_not_reached();
}
}
if (domain_prot == 3) {
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index b11a8b9a189..86710509d20 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -1200,7 +1200,7 @@ int hvf_vcpu_exec(CPUState *cpu)
/* we got kicked, no exit to process */
return 0;
default:
- assert(0);
+ g_assert_not_reached();
}
hvf_sync_vtimer(cpu);
diff --git a/target/arm/kvm-stub.c b/target/arm/kvm-stub.c
index 56a7099e6b9..965a486b320 100644
--- a/target/arm/kvm-stub.c
+++ b/target/arm/kvm-stub.c
@@ -15,10 +15,10 @@
bool write_kvmstate_to_list(ARMCPU *cpu)
{
- abort();
+ g_assert_not_reached();
}
bool write_list_to_kvmstate(ARMCPU *cpu, int level)
{
- abort();
+ g_assert_not_reached();
}
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index 5fc37ac10a5..4339e1cd6e0 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -540,7 +540,7 @@ bool write_kvmstate_to_list(ARMCPU *cpu)
ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
break;
default:
- abort();
+ g_assert_not_reached();
}
if (ret) {
ok = false;
@@ -575,7 +575,7 @@ bool write_list_to_kvmstate(ARMCPU *cpu, int level)
r.addr = (uintptr_t)(cpu->cpreg_values + i);
break;
default:
- abort();
+ g_assert_not_reached();
}
ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
if (ret) {
diff --git a/target/arm/machine.c b/target/arm/machine.c
index 135d2420b5c..285e387d2c3 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -661,7 +661,7 @@ static int cpu_pre_save(void *opaque)
if (kvm_enabled()) {
if (!write_kvmstate_to_list(cpu)) {
/* This should never fail */
- abort();
+ g_assert_not_reached();
}
/*
@@ -672,7 +672,7 @@ static int cpu_pre_save(void *opaque)
} else {
if (!write_cpustate_to_list(cpu, false)) {
/* This should never fail. */
- abort();
+ g_assert_not_reached();
}
}
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index a82f5d5984b..b80313670f9 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -6151,7 +6151,7 @@ static void handle_fp_1src_half(DisasContext *s, int opcode, int rd, int rn)
gen_helper_advsimd_rinth(tcg_res, tcg_op, fpst);
break;
default:
- abort();
+ g_assert_not_reached();
}
write_fp_sreg(s, rd, tcg_res);
@@ -6392,7 +6392,7 @@ static void handle_fp_fcvt(DisasContext *s, int opcode,
break;
}
default:
- abort();
+ g_assert_not_reached();
}
}
diff --git a/target/arm/translate-neon.c b/target/arm/translate-neon.c
index 2e4d1ec87d9..321c17e2c7e 100644
--- a/target/arm/translate-neon.c
+++ b/target/arm/translate-neon.c
@@ -679,7 +679,7 @@ static bool trans_VLDST_single(DisasContext *s, arg_VLDST_single *a)
}
break;
default:
- abort();
+ g_assert_not_reached();
}
if ((vd + a->stride * (nregs - 1)) > 31) {
/*
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 050c237b076..4e19191ed5c 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -5156,7 +5156,7 @@ static void gen_srs(DisasContext *s,
offset = 4;
break;
default:
- abort();
+ g_assert_not_reached();
}
tcg_gen_addi_i32(addr, addr, offset);
tmp = load_reg(s, 14);
@@ -5181,7 +5181,7 @@ static void gen_srs(DisasContext *s,
offset = 0;
break;
default:
- abort();
+ g_assert_not_reached();
}
tcg_gen_addi_i32(addr, addr, offset);
gen_helper_set_r13_banked(cpu_env, tcg_constant_i32(mode), addr);
--
2.25.1
next prev parent reply other threads:[~2022-05-05 9:23 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-05 9:11 [PULL 00/23] target-arm queue Peter Maydell
2022-05-05 9:11 ` [PULL 01/23] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user Peter Maydell
2022-05-05 9:11 ` [PULL 02/23] target/arm: Split out cpregs.h Peter Maydell
2022-05-05 9:11 ` [PULL 03/23] target/arm: Reorg CPAccessResult and access_check_cp_reg Peter Maydell
2022-05-05 9:11 ` [PULL 04/23] target/arm: Replace sentinels with ARRAY_SIZE in cpregs.h Peter Maydell
2022-05-05 9:11 ` [PULL 05/23] target/arm: Make some more cpreg data static const Peter Maydell
2022-05-05 9:11 ` [PULL 06/23] target/arm: Reorg ARMCPRegInfo type field bits Peter Maydell
2022-05-05 9:11 ` Peter Maydell [this message]
2022-05-05 9:11 ` [PULL 08/23] target/arm: Change cpreg access permissions to enum Peter Maydell
2022-05-05 9:11 ` [PULL 09/23] target/arm: Name CPState type Peter Maydell
2022-05-05 9:11 ` [PULL 10/23] target/arm: Name CPSecureState type Peter Maydell
2022-05-05 9:11 ` [PULL 11/23] target/arm: Drop always-true test in define_arm_vh_e2h_redirects_aliases Peter Maydell
2022-05-05 9:11 ` [PULL 12/23] target/arm: Store cpregs key in the hash table directly Peter Maydell
2022-05-05 9:11 ` [PULL 13/23] target/arm: Merge allocation of the cpreg and its name Peter Maydell
2022-05-05 9:11 ` [PULL 14/23] target/arm: Hoist computation of key in add_cpreg_to_hashtable Peter Maydell
2022-05-05 9:11 ` [PULL 15/23] target/arm: Consolidate cpreg updates " Peter Maydell
2022-05-05 9:11 ` [PULL 16/23] target/arm: Use bool for is64 and ns " Peter Maydell
2022-05-05 9:11 ` [PULL 17/23] target/arm: Hoist isbanked computation " Peter Maydell
2022-05-05 9:11 ` [PULL 18/23] target/arm: Perform override check early " Peter Maydell
2022-05-05 9:11 ` [PULL 19/23] target/arm: Reformat comments " Peter Maydell
2022-05-05 9:11 ` [PULL 20/23] target/arm: Remove HOST_BIG_ENDIAN ifdef " Peter Maydell
2022-05-05 9:11 ` [PULL 21/23] target/arm: Add isar predicates for FEAT_Debugv8p2 Peter Maydell
2022-05-05 9:11 ` [PULL 22/23] target/arm: Add isar_feature_{aa64,any}_ras Peter Maydell
2022-05-05 9:11 ` [PULL 23/23] target/arm: read access to performance counters from EL0 Peter Maydell
2022-05-05 17:56 ` [PULL 00/23] target-arm queue Richard Henderson
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