From: Atish Patra <atishp@rivosinc.com>
To: qemu-devel@nongnu.org
Cc: Atish Patra <atishp@rivosinc.com>,
Alistair Francis <alistair.francis@wdc.com>,
Anup Patel <anup.patel@wdc.com>,
qemu-riscv@nongnu.org, dylan@rivosinc.com,
Bin Meng <bmeng.cn@gmail.com>,
Frank Chang <frank.chang@sifive.com>,
Jim Shu <jim.shu@sifive.com>
Subject: [PATCH] hw/intc: Pass correct hartid while updating mtimecmp
Date: Fri, 13 May 2022 15:14:58 -0700 [thread overview]
Message-ID: <20220513221458.1192933-1-atishp@rivosinc.com> (raw)
timecmp update function should be invoked with hartid for which
timecmp is being updated. The following patch passes the incorrect
hartid to the update function.
Fixes: e2f01f3c2e13 ("hw/intc: Make RISC-V ACLINT mtime MMIO register writable")
Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
hw/intc/riscv_aclint.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/intc/riscv_aclint.c b/hw/intc/riscv_aclint.c
index 0412edc98257..e6bceceefdbc 100644
--- a/hw/intc/riscv_aclint.c
+++ b/hw/intc/riscv_aclint.c
@@ -233,7 +233,8 @@ static void riscv_aclint_mtimer_write(void *opaque, hwaddr addr,
continue;
}
riscv_aclint_mtimer_write_timecmp(mtimer, RISCV_CPU(cpu),
- i, env->timecmp);
+ mtimer->hartid_base + i,
+ env->timecmp);
}
return;
}
--
2.25.1
next reply other threads:[~2022-05-13 22:17 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-13 22:14 Atish Patra [this message]
2022-05-14 2:21 ` [PATCH] hw/intc: Pass correct hartid while updating mtimecmp Frank Chang
2022-05-14 4:42 ` Anup Patel
2022-05-16 22:41 ` Alistair Francis
2022-05-16 23:10 ` Alistair Francis
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