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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Subject: [PULL 13/17] i386: Hyper-V Enlightened MSR bitmap feature
Date: Wed, 25 May 2022 21:28:48 +0200	[thread overview]
Message-ID: <20220525192852.301633-14-pbonzini@redhat.com> (raw)
In-Reply-To: <20220525192852.301633-1-pbonzini@redhat.com>

From: Vitaly Kuznetsov <vkuznets@redhat.com>

The newly introduced enlightenment allow L0 (KVM) and L1 (Hyper-V)
hypervisors to collaborate to avoid unnecessary updates to L2
MSR-Bitmap upon vmexits.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <20220525115949.1294004-3-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 docs/hyperv.txt                | 9 +++++++++
 target/i386/cpu.h              | 1 +
 target/i386/kvm/hyperv-proto.h | 5 +++++
 target/i386/cpu.c              | 2 ++
 target/i386/kvm/kvm.c          | 7 +++++++
 5 files changed, 24 insertions(+)

diff --git a/docs/hyperv.txt b/docs/hyperv.txt
index 33588a0396..5d85569b99 100644
--- a/docs/hyperv.txt
+++ b/docs/hyperv.txt
@@ -239,6 +239,15 @@ This enlightenment requires a VMBus device (-device vmbus-bridge,irq=15)
 and the follow enlightenments to work:
 hv-relaxed,hv_time,hv-vapic,hv-vpindex,hv-synic,hv-runtime,hv-stimer
 
+3.22. hv-emsr-bitmap
+=====================
+The enlightenment is nested specific, it targets Hyper-V on KVM guests. When
+enabled, it allows L0 (KVM) and L1 (Hyper-V) hypervisors to collaborate to
+avoid unnecessary updates to L2 MSR-Bitmap upon vmexits. While the protocol is
+supported for both VMX (Intel) and SVM (AMD), the VMX implementation requires
+Enlightened VMCS ('hv-evmcs') feature to also be enabled.
+
+Recommended: hv-evmcs (Intel)
 
 4. Supplementary features
 =========================
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 2e918daf6b..c788285736 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1106,6 +1106,7 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
 #define HYPERV_FEAT_STIMER_DIRECT       14
 #define HYPERV_FEAT_AVIC                15
 #define HYPERV_FEAT_SYNDBG              16
+#define HYPERV_FEAT_MSR_BITMAP          17
 
 #ifndef HYPERV_SPINLOCK_NEVER_NOTIFY
 #define HYPERV_SPINLOCK_NEVER_NOTIFY             0xFFFFFFFF
diff --git a/target/i386/kvm/hyperv-proto.h b/target/i386/kvm/hyperv-proto.h
index e40e59411c..cea18dbc0e 100644
--- a/target/i386/kvm/hyperv-proto.h
+++ b/target/i386/kvm/hyperv-proto.h
@@ -86,6 +86,11 @@
  */
 #define HV_SYNDBG_CAP_ALLOW_KERNEL_DEBUGGING    (1u << 1)
 
+/*
+ * HV_CPUID_NESTED_FEATURES.EAX bits
+ */
+#define HV_NESTED_MSR_BITMAP                (1u << 19)
+
 /*
  * Basic virtualized MSRs
  */
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 385691458f..474e9b582e 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6968,6 +6968,8 @@ static Property x86_cpu_properties[] = {
                       HYPERV_FEAT_STIMER_DIRECT, 0),
     DEFINE_PROP_BIT64("hv-avic", X86CPU, hyperv_features,
                       HYPERV_FEAT_AVIC, 0),
+    DEFINE_PROP_BIT64("hv-emsr-bitmap", X86CPU, hyperv_features,
+                      HYPERV_FEAT_MSR_BITMAP, 0),
     DEFINE_PROP_ON_OFF_AUTO("hv-no-nonarch-coresharing", X86CPU,
                             hyperv_no_nonarch_cs, ON_OFF_AUTO_OFF),
     DEFINE_PROP_BIT64("hv-syndbg", X86CPU, hyperv_features,
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index 38af0e4f04..f389bbedf2 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -973,6 +973,13 @@ static struct {
         .dependencies = BIT(HYPERV_FEAT_SYNIC) | BIT(HYPERV_FEAT_RELAXED)
     },
 #endif
+    [HYPERV_FEAT_MSR_BITMAP] = {
+        .desc = "enlightened MSR-Bitmap (hv-emsr-bitmap)",
+        .flags = {
+            {.func = HV_CPUID_NESTED_FEATURES, .reg = R_EAX,
+             .bits = HV_NESTED_MSR_BITMAP}
+        }
+    },
 };
 
 static struct kvm_cpuid2 *try_get_hv_cpuid(CPUState *cs, int max,
-- 
2.36.1




  parent reply	other threads:[~2022-05-25 19:43 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-25 19:28 [PULL 00/17] Misc patches for 2022-05-25 Paolo Bonzini
2022-05-25 19:28 ` [PULL 01/17] target/i386: Remove LBREn bit check when access Arch LBR MSRs Paolo Bonzini
2022-05-25 19:28 ` [PULL 02/17] hostmem: default the amount of prealloc-threads to smp-cpus Paolo Bonzini
2022-05-25 19:28 ` [PULL 03/17] thread-pool: optimize scheduling of completion bottom half Paolo Bonzini
2022-05-25 19:28 ` [PULL 04/17] thread-pool: replace semaphore with condition variable Paolo Bonzini
2022-05-25 19:28 ` [PULL 05/17] thread-pool: remove stopping variable Paolo Bonzini
2022-05-25 19:28 ` [PULL 06/17] contrib/elf2dmp: add ELF dump header checking Paolo Bonzini
2022-05-25 19:28 ` [PULL 07/17] hw/audio/ac97: Coding style fixes to avoid checkpatch errors Paolo Bonzini
2022-05-25 19:28 ` [PULL 08/17] hw/audio/ac97: Remove unimplemented reset functions Paolo Bonzini
2022-05-25 19:28 ` [PULL 09/17] hw/audio/ac97: Remove unneeded local variables Paolo Bonzini
2022-05-25 19:28 ` [PULL 10/17] target/i386/kvm: Fix disabling MPX on "-cpu host" with MPX-capable host Paolo Bonzini
2022-05-25 19:28 ` [PULL 11/17] ide_ioport_read: Return lower octet of data register instead of 0xFF Paolo Bonzini
2022-05-25 19:28 ` [PULL 12/17] i386: Use hv_build_cpuid_leaf() for HV_CPUID_NESTED_FEATURES Paolo Bonzini
2022-05-25 19:28 ` Paolo Bonzini [this message]
2022-05-25 19:28 ` [PULL 14/17] i386: Hyper-V XMM fast hypercall input feature Paolo Bonzini
2022-05-25 19:28 ` [PULL 15/17] i386: Hyper-V Support extended GVA ranges for TLB flush hypercalls Paolo Bonzini
2022-05-25 19:28 ` [PULL 16/17] i386: Hyper-V Direct TLB flush hypercall Paolo Bonzini
2022-05-25 19:28 ` [PULL 17/17] i386: docs: Convert hyperv.txt to rST Paolo Bonzini
2022-05-25 22:20 ` [PULL 00/17] Misc patches for 2022-05-25 Richard Henderson

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