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Wed, 25 May 2022 12:28:57 -0700 (PDT) X-Google-Smtp-Source: ABdhPJygu6IeBWcpD4BjjgVh71MuUzHXSPnkTdYNzWmzxvQEnpGp8H2RIXt9ahysGGDysV8R3cMpSw== X-Received: by 2002:a17:906:c209:b0:6fe:a3d5:c5a4 with SMTP id d9-20020a170906c20900b006fea3d5c5a4mr26041558ejz.759.1653506937209; Wed, 25 May 2022 12:28:57 -0700 (PDT) Received: from goa-sendmail ([2001:b07:6468:f312:9af8:e5f5:7516:fa89]) by smtp.gmail.com with ESMTPSA id n6-20020a170906700600b006fed40e5564sm3864081ejj.83.2022.05.25.12.28.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 12:28:56 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Yang Weijiang Subject: [PULL 01/17] target/i386: Remove LBREn bit check when access Arch LBR MSRs Date: Wed, 25 May 2022 21:28:36 +0200 Message-Id: <20220525192852.301633-2-pbonzini@redhat.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220525192852.301633-1-pbonzini@redhat.com> References: <20220525192852.301633-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Yang Weijiang Live migration can happen when Arch LBR LBREn bit is cleared, e.g., when migration happens after guest entered SMM mode. In this case, we still need to migrate Arch LBR MSRs. Signed-off-by: Yang Weijiang Message-Id: <20220517155024.33270-1-weijiang.yang@intel.com> Signed-off-by: Paolo Bonzini --- target/i386/kvm/kvm.c | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index a9ee8eebd7..e2d675115b 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -3373,15 +3373,14 @@ static int kvm_put_msrs(X86CPU *cpu, int level) int i, ret; /* - * Only migrate Arch LBR states when: 1) Arch LBR is enabled - * for migrated vcpu. 2) the host Arch LBR depth equals that - * of source guest's, this is to avoid mismatch of guest/host - * config for the msr hence avoid unexpected misbehavior. + * Only migrate Arch LBR states when the host Arch LBR depth + * equals that of source guest's, this is to avoid mismatch + * of guest/host config for the msr hence avoid unexpected + * misbehavior. */ ret = kvm_get_one_msr(cpu, MSR_ARCH_LBR_DEPTH, &depth); - if (ret == 1 && (env->msr_lbr_ctl & 0x1) && !!depth && - depth == env->msr_lbr_depth) { + if (ret == 1 && !!depth && depth == env->msr_lbr_depth) { kvm_msr_entry_add(cpu, MSR_ARCH_LBR_CTL, env->msr_lbr_ctl); kvm_msr_entry_add(cpu, MSR_ARCH_LBR_DEPTH, env->msr_lbr_depth); @@ -3801,13 +3800,11 @@ static int kvm_get_msrs(X86CPU *cpu) if (kvm_enabled() && cpu->enable_pmu && (env->features[FEAT_7_0_EDX] & CPUID_7_0_EDX_ARCH_LBR)) { - uint64_t ctl, depth; - int i, ret2; + uint64_t depth; + int i, ret; - ret = kvm_get_one_msr(cpu, MSR_ARCH_LBR_CTL, &ctl); - ret2 = kvm_get_one_msr(cpu, MSR_ARCH_LBR_DEPTH, &depth); - if (ret == 1 && ret2 == 1 && (ctl & 0x1) && - depth == ARCH_LBR_NR_ENTRIES) { + ret = kvm_get_one_msr(cpu, MSR_ARCH_LBR_DEPTH, &depth); + if (ret == 1 && depth == ARCH_LBR_NR_ENTRIES) { kvm_msr_entry_add(cpu, MSR_ARCH_LBR_CTL, 0); kvm_msr_entry_add(cpu, MSR_ARCH_LBR_DEPTH, 0); -- 2.36.1