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From: Nikita Shubin <nikita.shubin@maquefel.me>
Cc: atishp@rivosinc.com, linux@yadro.com,
	Nikita Shubin <n.shubin@yadro.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Bin Meng <bin.meng@windriver.com>,
	qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH] target/riscv: fix priv enum
Date: Thu, 26 May 2022 11:42:40 +0300	[thread overview]
Message-ID: <20220526084240.31298-1-nikita.shubin@maquefel.me> (raw)

From: Nikita Shubin <n.shubin@yadro.com>

Add PRIV_VERSION_UNKNOWN to enum, otherwise PRIV_VERSION_1_10_0 will
be overwritten to PRIV_VERSION_1_12_0 in riscv_cpu_realize.

Fixes: a46d410c5c ("target/riscv: Define simpler privileged spec version numbering")
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
---
 target/riscv/cpu.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index f08c3e8813..1f1d6589a7 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -91,7 +91,8 @@ enum {
 
 /* Privileged specification version */
 enum {
-    PRIV_VERSION_1_10_0 = 0,
+    PRIV_VERSION_UNKNOWN = 0,
+    PRIV_VERSION_1_10_0,
     PRIV_VERSION_1_11_0,
     PRIV_VERSION_1_12_0,
 };
-- 
2.35.1



             reply	other threads:[~2022-05-26  9:00 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-26  8:42 Nikita Shubin [this message]
2022-05-26 10:07 ` [PATCH] target/riscv: fix priv enum Anup Patel
2022-05-26 10:48   ` Nikita Shubin

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