From: Atish Patra <atishp@rivosinc.com>
To: qemu-devel@nongnu.org
Cc: Atish Patra <atishp@rivosinc.com>,
Alistair Francis <alistair.francis@wdc.com>,
Bin Meng <bin.meng@windriver.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
qemu-riscv@nongnu.org
Subject: [PATCH] hw/riscv: virt: Generate fw_cfg DT node correctly
Date: Thu, 26 May 2022 13:35:00 -0700 [thread overview]
Message-ID: <20220526203500.847165-1-atishp@rivosinc.com> (raw)
fw_cfg DT node is generated after the create_fdt without any check
if the DT is being loaded from the commandline. This results in
FDT_ERR_EXISTS error if dtb is loaded from the commandline.
Generate fw_cfg node only if the DT is not loaded from the commandline.
Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
hw/riscv/virt.c | 28 ++++++++++++++++++----------
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index c57617381517..07aeee3bf0c3 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -975,6 +975,23 @@ static void create_fdt_flash(RISCVVirtState *s, const MemMapEntry *memmap)
g_free(name);
}
+static void create_fdt_fw_cfg(RISCVVirtState *s, const MemMapEntry *memmap)
+{
+ char *nodename;
+ MachineState *mc = MACHINE(s);
+ hwaddr base = memmap[VIRT_FW_CFG].base;
+ hwaddr size = memmap[VIRT_FW_CFG].size;
+
+ nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base);
+ qemu_fdt_add_subnode(mc->fdt, nodename);
+ qemu_fdt_setprop_string(mc->fdt, nodename,
+ "compatible", "qemu,fw-cfg-mmio");
+ qemu_fdt_setprop_sized_cells(mc->fdt, nodename, "reg",
+ 2, base, 2, size);
+ qemu_fdt_setprop(mc->fdt, nodename, "dma-coherent", NULL, 0);
+ g_free(nodename);
+}
+
static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap,
uint64_t mem_size, const char *cmdline, bool is_32_bit)
{
@@ -1023,6 +1040,7 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap,
create_fdt_rtc(s, memmap, irq_mmio_phandle);
create_fdt_flash(s, memmap);
+ create_fdt_fw_cfg(s, memmap);
update_bootargs:
if (cmdline && *cmdline) {
@@ -1082,22 +1100,12 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem,
static FWCfgState *create_fw_cfg(const MachineState *mc)
{
hwaddr base = virt_memmap[VIRT_FW_CFG].base;
- hwaddr size = virt_memmap[VIRT_FW_CFG].size;
FWCfgState *fw_cfg;
- char *nodename;
fw_cfg = fw_cfg_init_mem_wide(base + 8, base, 8, base + 16,
&address_space_memory);
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)mc->smp.cpus);
- nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base);
- qemu_fdt_add_subnode(mc->fdt, nodename);
- qemu_fdt_setprop_string(mc->fdt, nodename,
- "compatible", "qemu,fw-cfg-mmio");
- qemu_fdt_setprop_sized_cells(mc->fdt, nodename, "reg",
- 2, base, 2, size);
- qemu_fdt_setprop(mc->fdt, nodename, "dma-coherent", NULL, 0);
- g_free(nodename);
return fw_cfg;
}
--
2.25.1
next reply other threads:[~2022-05-26 20:37 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-26 20:35 Atish Patra [this message]
2022-06-01 2:05 ` [PATCH] hw/riscv: virt: Generate fw_cfg DT node correctly Alistair Francis
2022-06-01 3:52 ` Alistair Francis
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