From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: =gaosong@loongson.cn, yangxiaojuan@loongson.cn,
Song Gao <gaosong@loongson.cn>
Subject: [PULL 42/43] tests/tcg/loongarch64: Add hello/memory test in loongarch64 system
Date: Mon, 6 Jun 2022 16:14:49 -0700 [thread overview]
Message-ID: <20220606231450.448443-43-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220606231450.448443-1-richard.henderson@linaro.org>
From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
- We write a very minimal softmmu harness.
- This is a very simple smoke test with no need to run a full Linux/kernel.
- The Makefile.softmmu-target record the rule to run.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-43-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tests/tcg/loongarch64/system/regdef.h | 86 +++++++++++++++++++
MAINTAINERS | 1 +
tests/tcg/loongarch64/Makefile.softmmu-target | 33 +++++++
tests/tcg/loongarch64/system/boot.S | 56 ++++++++++++
tests/tcg/loongarch64/system/kernel.ld | 30 +++++++
5 files changed, 206 insertions(+)
create mode 100644 tests/tcg/loongarch64/system/regdef.h
create mode 100644 tests/tcg/loongarch64/Makefile.softmmu-target
create mode 100644 tests/tcg/loongarch64/system/boot.S
create mode 100644 tests/tcg/loongarch64/system/kernel.ld
diff --git a/tests/tcg/loongarch64/system/regdef.h b/tests/tcg/loongarch64/system/regdef.h
new file mode 100644
index 0000000000..faa09b2377
--- /dev/null
+++ b/tests/tcg/loongarch64/system/regdef.h
@@ -0,0 +1,86 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021 Loongson Technology Corporation Limited
+ */
+#ifndef _ASM_REGDEF_H
+#define _ASM_REGDEF_H
+
+#define zero $r0 /* wired zero */
+#define ra $r1 /* return address */
+#define tp $r2
+#define sp $r3 /* stack pointer */
+#define v0 $r4 /* return value - caller saved */
+#define v1 $r5
+#define a0 $r4 /* argument registers */
+#define a1 $r5
+#define a2 $r6
+#define a3 $r7
+#define a4 $r8
+#define a5 $r9
+#define a6 $r10
+#define a7 $r11
+#define t0 $r12 /* caller saved */
+#define t1 $r13
+#define t2 $r14
+#define t3 $r15
+#define t4 $r16
+#define t5 $r17
+#define t6 $r18
+#define t7 $r19
+#define t8 $r20
+ /* $r21: Temporarily reserved */
+#define fp $r22 /* frame pointer */
+#define s0 $r23 /* callee saved */
+#define s1 $r24
+#define s2 $r25
+#define s3 $r26
+#define s4 $r27
+#define s5 $r28
+#define s6 $r29
+#define s7 $r30
+#define s8 $r31
+
+#define gr0 $r0
+#define gr1 $r1
+#define gr2 $r2
+#define gr3 $r3
+#define gr4 $r4
+#define gr5 $r5
+#define gr6 $r6
+#define gr7 $r7
+#define gr8 $r8
+#define gr9 $r9
+#define gr10 $r10
+#define gr11 $r11
+#define gr12 $r12
+#define gr13 $r13
+#define gr14 $r14
+#define gr15 $r15
+#define gr16 $r16
+#define gr17 $r17
+#define gr18 $r18
+#define gr19 $r19
+#define gr20 $r20
+#define gr21 $r21
+#define gr22 $r22
+#define gr23 $r23
+#define gr24 $r24
+#define gr25 $r25
+#define gr26 $r26
+#define gr27 $r27
+#define gr28 $r28
+#define gr29 $r29
+#define gr30 $r30
+#define gr31 $r31
+
+#define STT_NOTYPE 0
+#define STT_OBJECT 1
+#define STT_FUNC 2
+#define STT_SECTION 3
+#define STT_FILE 4
+#define STT_COMMON 5
+#define STT_TLS 6
+
+#define ASM_NL ;
+
+#endif /* _ASM_REGDEF_H */
diff --git a/MAINTAINERS b/MAINTAINERS
index 954fb95218..5580a36b68 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -217,6 +217,7 @@ M: Song Gao <gaosong@loongson.cn>
M: Xiaojuan Yang <yangxiaojuan@loongson.cn>
S: Maintained
F: target/loongarch/
+F: tests/tcg/loongarch64/
M68K TCG CPUs
M: Laurent Vivier <laurent@vivier.eu>
diff --git a/tests/tcg/loongarch64/Makefile.softmmu-target b/tests/tcg/loongarch64/Makefile.softmmu-target
new file mode 100644
index 0000000000..908f3a8c0f
--- /dev/null
+++ b/tests/tcg/loongarch64/Makefile.softmmu-target
@@ -0,0 +1,33 @@
+#
+# Loongarch64 system tests
+#
+
+LOONGARCH64_SYSTEM_SRC=$(SRC_PATH)/tests/tcg/loongarch64/system
+VPATH+=$(LOONGARCH64_SYSTEM_SRC)
+
+# These objects provide the basic boot code and helper functions for all tests
+CRT_OBJS=boot.o
+
+LOONGARCH64_TEST_SRCS=$(wildcard $(LOONGARCH64_SYSTEM_SRC)/*.c)
+LOONGARCH64_TESTS = $(patsubst $(LOONGARCH64_SYSTEM_SRC)/%.c, %, $(LOONGARCH64_TEST_SRCS))
+
+CRT_PATH=$(LOONGARCH64_SYSTEM_SRC)
+LINK_SCRIPT=$(LOONGARCH64_SYSTEM_SRC)/kernel.ld
+LDFLAGS=-Wl,-T$(LINK_SCRIPT)
+TESTS+=$(LOONGARCH64_TESTS) $(MULTIARCH_TESTS)
+CFLAGS+=-nostdlib -g -O1 -march=loongarch64 -mabi=lp64d $(MINILIB_INC)
+LDFLAGS+=-static -nostdlib $(CRT_OBJS) $(MINILIB_OBJS) -lgcc
+
+# building head blobs
+.PRECIOUS: $(CRT_OBJS)
+
+%.o: $(CRT_PATH)/%.S
+ $(CC) $(CFLAGS) $(EXTRA_CFLAGS) -x assembler-with-cpp -c $< -o $@
+
+# Build and link the tests
+%: %.c $(LINK_SCRIPT) $(CRT_OBJS) $(MINILIB_OBJS)
+ $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
+
+memory: CFLAGS+=-DCHECK_UNALIGNED=0
+# Running
+QEMU_OPTS+=-serial chardev:output -kernel
diff --git a/tests/tcg/loongarch64/system/boot.S b/tests/tcg/loongarch64/system/boot.S
new file mode 100644
index 0000000000..67eb1c04ce
--- /dev/null
+++ b/tests/tcg/loongarch64/system/boot.S
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Minimal LoongArch system boot code.
+ *
+ * Copyright (c) 2021 Loongson Technology Corporation Limited
+ */
+
+#include "regdef.h"
+
+ .global _start
+ .align 16
+_start:
+ la.local t0, stack_end
+ move sp, t0
+ bl main
+
+ .type _start 2
+ .size _start, .-_start
+
+ .global _exit
+ .align 16
+_exit:
+2: /* QEMU ACPI poweroff */
+ li.w t0, 0xff
+ li.w t1, 0x10080010
+ st.w t0, t1, 0
+ idle 0
+ bl 2b
+
+ .type _exit 2
+ .size _exit, .-_exit
+
+ .global __sys_outc
+__sys_outc:
+ li.d t1, 1000000
+loop:
+ lu12i.w t2, 0x1fe00
+ ori t0, t2, 0x1e5
+ ld.bu t0, t0, 0
+ andi t0, t0, 0x20
+ ext.w.b t0, t0
+ bnez t0, in
+ addi.w t1, t1, -1
+ bnez t1, loop
+in:
+ ext.w.b a0, a0
+ lu12i.w t0, 0x1fe00
+ ori t0, t0, 0x1e0
+ st.b a0, t0, 0
+ jirl $r0, ra, 0
+
+ .data
+ .align 4
+stack:
+ .space 65536
+stack_end:
diff --git a/tests/tcg/loongarch64/system/kernel.ld b/tests/tcg/loongarch64/system/kernel.ld
new file mode 100644
index 0000000000..f1a7c0168c
--- /dev/null
+++ b/tests/tcg/loongarch64/system/kernel.ld
@@ -0,0 +1,30 @@
+ENTRY(_start)
+
+SECTIONS
+{
+ /* Linux kernel legacy start address. */
+ . = 0x9000000000200000;
+ _text = .;
+ .text : {
+ *(.text)
+ }
+ .rodata : {
+ *(.rodata)
+ }
+ _etext = .;
+
+ . = ALIGN(8192);
+ _data = .;
+ .got : {
+ *(.got)
+ }
+ .data : {
+ *(.sdata)
+ *(.data)
+ }
+ _edata = .;
+ .bss : {
+ *(.bss)
+ }
+ _end = .;
+}
--
2.34.1
next prev parent reply other threads:[~2022-06-06 23:56 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-06 23:14 [PULL 00/43] target/loongarch: Initial system support Richard Henderson
2022-06-06 23:14 ` [PULL 01/43] target/loongarch: Add README Richard Henderson
2022-06-06 23:14 ` [PULL 02/43] target/loongarch: Add core definition Richard Henderson
2022-06-06 23:14 ` [PULL 03/43] target/loongarch: Add main translation routines Richard Henderson
2022-06-06 23:14 ` [PULL 04/43] target/loongarch: Add fixed point arithmetic instruction translation Richard Henderson
2022-06-06 23:14 ` [PULL 05/43] target/loongarch: Add fixed point shift " Richard Henderson
2022-06-06 23:14 ` [PULL 06/43] target/loongarch: Add fixed point bit " Richard Henderson
2022-06-06 23:14 ` [PULL 07/43] target/loongarch: Add fixed point load/store " Richard Henderson
2022-06-06 23:14 ` [PULL 08/43] target/loongarch: Add fixed point atomic " Richard Henderson
2022-06-06 23:14 ` [PULL 09/43] target/loongarch: Add fixed point extra " Richard Henderson
2022-06-06 23:14 ` [PULL 10/43] target/loongarch: Add floating point arithmetic " Richard Henderson
2022-06-06 23:14 ` [PULL 11/43] target/loongarch: Add floating point comparison " Richard Henderson
2022-06-06 23:14 ` [PULL 12/43] target/loongarch: Add floating point conversion " Richard Henderson
2022-06-06 23:14 ` [PULL 13/43] target/loongarch: Add floating point move " Richard Henderson
2022-06-06 23:14 ` [PULL 14/43] target/loongarch: Add floating point load/store " Richard Henderson
2022-06-06 23:14 ` [PULL 15/43] target/loongarch: Add branch " Richard Henderson
2022-06-06 23:14 ` [PULL 16/43] target/loongarch: Add disassembler Richard Henderson
2022-06-06 23:14 ` [PULL 17/43] target/loongarch: Add target build suport Richard Henderson
2022-06-06 23:14 ` [PULL 18/43] target/loongarch: Add system emulation introduction Richard Henderson
2022-06-06 23:14 ` [PULL 19/43] target/loongarch: Add CSRs definition Richard Henderson
2022-06-06 23:14 ` [PULL 20/43] target/loongarch: Add basic vmstate description of CPU Richard Henderson
2022-06-06 23:14 ` [PULL 21/43] target/loongarch: Implement qmp_query_cpu_definitions() Richard Henderson
2022-06-06 23:14 ` [PULL 22/43] target/loongarch: Add MMU support for LoongArch CPU Richard Henderson
2022-06-06 23:14 ` [PULL 23/43] target/loongarch: Add LoongArch interrupt and exception handle Richard Henderson
2022-06-06 23:14 ` [PULL 24/43] target/loongarch: Add constant timer support Richard Henderson
2022-06-06 23:14 ` [PULL 25/43] target/loongarch: Add LoongArch CSR instruction Richard Henderson
2022-06-06 23:14 ` [PULL 26/43] target/loongarch: Add LoongArch IOCSR instruction Richard Henderson
2022-06-06 23:14 ` [PULL 27/43] target/loongarch: Add TLB instruction support Richard Henderson
2024-11-07 17:33 ` Peter Maydell
2024-11-26 13:13 ` Peter Maydell
2025-02-10 11:37 ` Peter Maydell
2022-06-06 23:14 ` [PULL 28/43] target/loongarch: Add other core instructions support Richard Henderson
2022-06-06 23:14 ` [PULL 29/43] target/loongarch: Add timer related " Richard Henderson
2022-06-06 23:14 ` [PULL 30/43] hw/loongarch: Add support loongson3 virt machine type Richard Henderson
2022-06-06 23:14 ` [PULL 31/43] hw/loongarch: Add LoongArch ipi interrupt support(IPI) Richard Henderson
2022-06-06 23:14 ` [PULL 32/43] hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC) Richard Henderson
2022-06-06 23:14 ` [PULL 33/43] hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI) Richard Henderson
2022-06-06 23:14 ` [PULL 34/43] hw/intc: Add LoongArch extioi interrupt controller(EIOINTC) Richard Henderson
2022-06-06 23:14 ` [PULL 35/43] hw/loongarch: Add irq hierarchy for the system Richard Henderson
2022-06-06 23:14 ` [PULL 36/43] Enable common virtio pci support for LoongArch Richard Henderson
2022-06-06 23:14 ` [PULL 37/43] hw/loongarch: Add some devices support for 3A5000 Richard Henderson
2022-06-06 23:14 ` [PULL 38/43] hw/loongarch: Add LoongArch ls7a rtc device support Richard Henderson
2022-06-28 11:05 ` Peter Maydell
2022-06-28 12:04 ` yangxiaojuan
2022-06-06 23:14 ` [PULL 39/43] hw/loongarch: Add LoongArch load elf function Richard Henderson
2022-06-06 23:14 ` [PULL 40/43] hw/loongarch: Add LoongArch virt power manager support Richard Henderson
2022-06-06 23:14 ` [PULL 41/43] target/loongarch: Add gdb support Richard Henderson
2022-06-06 23:14 ` Richard Henderson [this message]
2022-06-06 23:14 ` [PULL 43/43] target/loongarch: 'make check-tcg' support Richard Henderson
2022-06-07 1:21 ` [PULL 00/43] target/loongarch: Initial system support Richard Henderson
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