From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BAD92C433EF for ; Tue, 7 Jun 2022 12:26:51 +0000 (UTC) Received: from localhost ([::1]:47054 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nyYIM-0001iU-E3 for qemu-devel@archiver.kernel.org; Tue, 07 Jun 2022 08:26:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52480) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nyX36-0001Hp-U6; Tue, 07 Jun 2022 07:07:03 -0400 Received: from mga07.intel.com ([134.134.136.100]:54793) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nyX34-0006kh-E5; Tue, 07 Jun 2022 07:07:00 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654600018; x=1686136018; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=ukc6CmRbesOsqX3v7NTWZ9wj95UUIuOYmHENgMtFwPE=; b=loKohuBchstb91D8ytpFzNjgPGW8CB5Jg6yiLtI4/5Dq407CRUkehsqN 3oHOFxirNddxEO1zMXO9uAdX8besVMDZhqed/KlXFmos6jr265R+q1R9R /XBWdoVGIqHquf32aeA3fk8jkeqC1xxsT5Xr4qaBFdWyH1F2B9HzA8H7l r3oEqHxuRHNtQbCNe/OdeTco7M/UzCyKtub9s12wnT9LfQoBWDsN80nKc NujYYljgwVQVVLwEL4Ve3K96VrgcEpRQg/B2jVVAZMrvRfyl5cyBYVvhf Ui+LoFnni2zx4K6SveysRAU5pWUDYLIlrfokYjbeas/6j/0GUp0nhZOVk Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10370"; a="340427061" X-IronPort-AV: E=Sophos;i="5.91,283,1647327600"; d="scan'208";a="340427061" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2022 04:06:54 -0700 X-IronPort-AV: E=Sophos;i="5.91,283,1647327600"; d="scan'208";a="826309766" Received: from lgieryk-mobl1.ger.corp.intel.com (HELO lgieryk-VirtualBox) ([10.213.15.192]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2022 04:06:51 -0700 Date: Tue, 7 Jun 2022 13:06:45 +0200 From: =?utf-8?Q?=C5=81ukasz?= Gieryk To: Klaus Jensen Cc: Lukasz Maniak , qemu-devel@nongnu.org, Keith Busch , qemu-block@nongnu.org, Klaus Jensen Subject: Re: [PATCH v2] hw/nvme: clean up CC register write logic Message-ID: <20220607110645.GA28312@lgieryk-VirtualBox> References: <20220525073524.2227333-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Received-SPF: none client-ip=134.134.136.100; envelope-from=lukasz.gieryk@linux.intel.com; helo=mga07.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Fri, Jun 03, 2022 at 10:24:51PM +0200, Klaus Jensen wrote: > On Jun 1 15:28, Lukasz Maniak wrote: > > On Wed, May 25, 2022 at 09:35:24AM +0200, Klaus Jensen wrote: > > > > > > + stl_le_p(&n->bar.intms, 0); > > > + stl_le_p(&n->bar.intmc, 0); > > > + stl_le_p(&n->bar.cc, 0); > > > > Looks fine, though it seems the NVMe spec says the above registers > > should be cleared during each reset for VF as well. > > > > Aren't the values of all other registers than CSTS just undefined? (NVMe > v2.0b, Section 8.26.3) My 2 cents – When VF is online: - Both Controller Reset (CR) and PCIe Function Level Reset (FLR) can be issued to given VF - Both resets shall return all (except specific) Nvme registers of given VF to their reset values (3.7.2) When VF is offline: - CR cannot be issued (only CSTS is defined, writes to CC are dropped), so doesn’t need an explicit IF - FLR is allowed as it’s a part of the procedure to bring VF online (mentioned in 8.26.3) - At least FLR shall reset the registers for VF So I agree with the other Lukasz's suggestion. I would also clear intms/intmc/cc for both: VF and PF reset paths, regardless of the actual reset type.