From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [PATCH v2 14/71] target/arm: Export sve contiguous ldst support functions
Date: Tue, 7 Jun 2022 13:32:09 -0700 [thread overview]
Message-ID: <20220607203306.657998-15-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220607203306.657998-1-richard.henderson@linaro.org>
Export all of the support functions for performing bulk
fault analysis on a set of elements at contiguous addresses
controlled by a predicate.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/sve_ldst_internal.h | 94 ++++++++++++++++++++++++++++++++++
target/arm/sve_helper.c | 87 ++++++-------------------------
2 files changed, 111 insertions(+), 70 deletions(-)
diff --git a/target/arm/sve_ldst_internal.h b/target/arm/sve_ldst_internal.h
index ef9117e84c..b5c473fc48 100644
--- a/target/arm/sve_ldst_internal.h
+++ b/target/arm/sve_ldst_internal.h
@@ -124,4 +124,98 @@ DO_ST_PRIM_2(dd, H1_8, uint64_t, uint64_t, stq)
#undef DO_LD_PRIM_2
#undef DO_ST_PRIM_2
+/*
+ * Resolve the guest virtual address to info->host and info->flags.
+ * If @nofault, return false if the page is invalid, otherwise
+ * exit via page fault exception.
+ */
+
+typedef struct {
+ void *host;
+ int flags;
+ MemTxAttrs attrs;
+} SVEHostPage;
+
+bool sve_probe_page(SVEHostPage *info, bool nofault, CPUARMState *env,
+ target_ulong addr, int mem_off, MMUAccessType access_type,
+ int mmu_idx, uintptr_t retaddr);
+
+/*
+ * Analyse contiguous data, protected by a governing predicate.
+ */
+
+typedef enum {
+ FAULT_NO,
+ FAULT_FIRST,
+ FAULT_ALL,
+} SVEContFault;
+
+typedef struct {
+ /*
+ * First and last element wholly contained within the two pages.
+ * mem_off_first[0] and reg_off_first[0] are always set >= 0.
+ * reg_off_last[0] may be < 0 if the first element crosses pages.
+ * All of mem_off_first[1], reg_off_first[1] and reg_off_last[1]
+ * are set >= 0 only if there are complete elements on a second page.
+ *
+ * The reg_off_* offsets are relative to the internal vector register.
+ * The mem_off_first offset is relative to the memory address; the
+ * two offsets are different when a load operation extends, a store
+ * operation truncates, or for multi-register operations.
+ */
+ int16_t mem_off_first[2];
+ int16_t reg_off_first[2];
+ int16_t reg_off_last[2];
+
+ /*
+ * One element that is misaligned and spans both pages,
+ * or -1 if there is no such active element.
+ */
+ int16_t mem_off_split;
+ int16_t reg_off_split;
+
+ /*
+ * The byte offset at which the entire operation crosses a page boundary.
+ * Set >= 0 if and only if the entire operation spans two pages.
+ */
+ int16_t page_split;
+
+ /* TLB data for the two pages. */
+ SVEHostPage page[2];
+} SVEContLdSt;
+
+/*
+ * Find first active element on each page, and a loose bound for the
+ * final element on each page. Identify any single element that spans
+ * the page boundary. Return true if there are any active elements.
+ */
+bool sve_cont_ldst_elements(SVEContLdSt *info, target_ulong addr, uint64_t *vg,
+ intptr_t reg_max, int esz, int msize);
+
+/*
+ * Resolve the guest virtual addresses to info->page[].
+ * Control the generation of page faults with @fault. Return false if
+ * there is no work to do, which can only happen with @fault == FAULT_NO.
+ */
+bool sve_cont_ldst_pages(SVEContLdSt *info, SVEContFault fault,
+ CPUARMState *env, target_ulong addr,
+ MMUAccessType access_type, uintptr_t retaddr);
+
+#ifdef CONFIG_USER_ONLY
+static inline void
+sve_cont_ldst_watchpoints(SVEContLdSt *info, CPUARMState *env, uint64_t *vg,
+ target_ulong addr, int esize, int msize,
+ int wp_access, uintptr_t retaddr)
+{ }
+#else
+void sve_cont_ldst_watchpoints(SVEContLdSt *info, CPUARMState *env,
+ uint64_t *vg, target_ulong addr,
+ int esize, int msize, int wp_access,
+ uintptr_t retaddr);
+#endif
+
+void sve_cont_ldst_mte_check(SVEContLdSt *info, CPUARMState *env, uint64_t *vg,
+ target_ulong addr, int esize, int msize,
+ uint32_t mtedesc, uintptr_t ra);
+
#endif /* TARGET_ARM_SVE_LDST_INTERNAL_H */
diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
index 0c6dde00aa..8cd371e3e3 100644
--- a/target/arm/sve_helper.c
+++ b/target/arm/sve_helper.c
@@ -5341,16 +5341,9 @@ static intptr_t find_next_active(uint64_t *vg, intptr_t reg_off,
* exit via page fault exception.
*/
-typedef struct {
- void *host;
- int flags;
- MemTxAttrs attrs;
-} SVEHostPage;
-
-static bool sve_probe_page(SVEHostPage *info, bool nofault,
- CPUARMState *env, target_ulong addr,
- int mem_off, MMUAccessType access_type,
- int mmu_idx, uintptr_t retaddr)
+bool sve_probe_page(SVEHostPage *info, bool nofault, CPUARMState *env,
+ target_ulong addr, int mem_off, MMUAccessType access_type,
+ int mmu_idx, uintptr_t retaddr)
{
int flags;
@@ -5406,59 +5399,13 @@ static bool sve_probe_page(SVEHostPage *info, bool nofault,
return true;
}
-
-/*
- * Analyse contiguous data, protected by a governing predicate.
- */
-
-typedef enum {
- FAULT_NO,
- FAULT_FIRST,
- FAULT_ALL,
-} SVEContFault;
-
-typedef struct {
- /*
- * First and last element wholly contained within the two pages.
- * mem_off_first[0] and reg_off_first[0] are always set >= 0.
- * reg_off_last[0] may be < 0 if the first element crosses pages.
- * All of mem_off_first[1], reg_off_first[1] and reg_off_last[1]
- * are set >= 0 only if there are complete elements on a second page.
- *
- * The reg_off_* offsets are relative to the internal vector register.
- * The mem_off_first offset is relative to the memory address; the
- * two offsets are different when a load operation extends, a store
- * operation truncates, or for multi-register operations.
- */
- int16_t mem_off_first[2];
- int16_t reg_off_first[2];
- int16_t reg_off_last[2];
-
- /*
- * One element that is misaligned and spans both pages,
- * or -1 if there is no such active element.
- */
- int16_t mem_off_split;
- int16_t reg_off_split;
-
- /*
- * The byte offset at which the entire operation crosses a page boundary.
- * Set >= 0 if and only if the entire operation spans two pages.
- */
- int16_t page_split;
-
- /* TLB data for the two pages. */
- SVEHostPage page[2];
-} SVEContLdSt;
-
/*
* Find first active element on each page, and a loose bound for the
* final element on each page. Identify any single element that spans
* the page boundary. Return true if there are any active elements.
*/
-static bool sve_cont_ldst_elements(SVEContLdSt *info, target_ulong addr,
- uint64_t *vg, intptr_t reg_max,
- int esz, int msize)
+bool sve_cont_ldst_elements(SVEContLdSt *info, target_ulong addr, uint64_t *vg,
+ intptr_t reg_max, int esz, int msize)
{
const int esize = 1 << esz;
const uint64_t pg_mask = pred_esz_masks[esz];
@@ -5548,9 +5495,9 @@ static bool sve_cont_ldst_elements(SVEContLdSt *info, target_ulong addr,
* Control the generation of page faults with @fault. Return false if
* there is no work to do, which can only happen with @fault == FAULT_NO.
*/
-static bool sve_cont_ldst_pages(SVEContLdSt *info, SVEContFault fault,
- CPUARMState *env, target_ulong addr,
- MMUAccessType access_type, uintptr_t retaddr)
+bool sve_cont_ldst_pages(SVEContLdSt *info, SVEContFault fault,
+ CPUARMState *env, target_ulong addr,
+ MMUAccessType access_type, uintptr_t retaddr)
{
int mmu_idx = cpu_mmu_index(env, false);
int mem_off = info->mem_off_first[0];
@@ -5606,12 +5553,12 @@ static bool sve_cont_ldst_pages(SVEContLdSt *info, SVEContFault fault,
return have_work;
}
-static void sve_cont_ldst_watchpoints(SVEContLdSt *info, CPUARMState *env,
- uint64_t *vg, target_ulong addr,
- int esize, int msize, int wp_access,
- uintptr_t retaddr)
-{
#ifndef CONFIG_USER_ONLY
+void sve_cont_ldst_watchpoints(SVEContLdSt *info, CPUARMState *env,
+ uint64_t *vg, target_ulong addr,
+ int esize, int msize, int wp_access,
+ uintptr_t retaddr)
+{
intptr_t mem_off, reg_off, reg_last;
int flags0 = info->page[0].flags;
int flags1 = info->page[1].flags;
@@ -5667,12 +5614,12 @@ static void sve_cont_ldst_watchpoints(SVEContLdSt *info, CPUARMState *env,
} while (reg_off & 63);
} while (reg_off <= reg_last);
}
-#endif
}
+#endif
-static void sve_cont_ldst_mte_check(SVEContLdSt *info, CPUARMState *env,
- uint64_t *vg, target_ulong addr, int esize,
- int msize, uint32_t mtedesc, uintptr_t ra)
+void sve_cont_ldst_mte_check(SVEContLdSt *info, CPUARMState *env,
+ uint64_t *vg, target_ulong addr, int esize,
+ int msize, uint32_t mtedesc, uintptr_t ra)
{
intptr_t mem_off, reg_off, reg_last;
--
2.34.1
next prev parent reply other threads:[~2022-06-07 20:49 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-07 20:31 [PATCH v2 00/71] target/arm: Scalable Matrix Extension Richard Henderson
2022-06-07 20:31 ` [PATCH v2 01/71] target/arm: Rename TBFLAG_A64 ZCR_LEN to VL Richard Henderson
2022-06-07 20:31 ` [PATCH v2 02/71] linux-user/aarch64: Introduce sve_vq Richard Henderson
2022-06-07 20:31 ` [PATCH v2 03/71] target/arm: Remove route_to_el2 check from sve_exception_el Richard Henderson
2022-06-07 20:31 ` [PATCH v2 04/71] target/arm: Remove fp checks " Richard Henderson
2022-06-07 20:32 ` [PATCH v2 05/71] target/arm: Add el_is_in_host Richard Henderson
2022-06-07 20:32 ` [PATCH v2 06/71] target/arm: Use el_is_in_host for sve_zcr_len_for_el Richard Henderson
2022-06-07 20:32 ` [PATCH v2 07/71] target/arm: Use el_is_in_host for sve_exception_el Richard Henderson
2022-06-07 20:32 ` [PATCH v2 08/71] target/arm: Hoist arm_is_el2_enabled check in sve_exception_el Richard Henderson
2022-06-07 20:32 ` [PATCH v2 09/71] target/arm: Do not use aarch64_sve_zcr_get_valid_len in reset Richard Henderson
2022-06-07 20:32 ` [PATCH v2 10/71] target/arm: Merge aarch64_sve_zcr_get_valid_len into caller Richard Henderson
2022-06-07 20:32 ` [PATCH v2 11/71] target/arm: Use uint32_t instead of bitmap for sve vq's Richard Henderson
2022-06-07 20:32 ` [PATCH v2 12/71] target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el Richard Henderson
2022-06-07 20:32 ` [PATCH v2 13/71] target/arm: Split out load/store primitives to sve_ldst_internal.h Richard Henderson
2022-06-07 20:32 ` Richard Henderson [this message]
2022-06-07 20:32 ` [PATCH v2 15/71] target/arm: Move expand_pred_b to vec_internal.h Richard Henderson
2022-06-07 20:32 ` [PATCH v2 16/71] target/arm: Use expand_pred_b in mve_helper.c Richard Henderson
2022-06-07 20:32 ` [PATCH v2 17/71] target/arm: Move expand_pred_h to vec_internal.h Richard Henderson
2022-06-07 20:32 ` [PATCH v2 18/71] target/arm: Export bfdotadd from vec_helper.c Richard Henderson
2022-06-07 20:32 ` [PATCH v2 19/71] target/arm: Add isar_feature_aa64_sme Richard Henderson
2022-06-07 20:32 ` [PATCH v2 20/71] target/arm: Add ID_AA64SMFR0_EL1 Richard Henderson
2022-06-07 20:32 ` [PATCH v2 21/71] target/arm: Implement TPIDR2_EL0 Richard Henderson
2022-06-09 15:24 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 22/71] target/arm: Add SMEEXC_EL to TB flags Richard Henderson
2022-06-07 20:32 ` [PATCH v2 23/71] target/arm: Add syn_smetrap Richard Henderson
2022-06-07 20:32 ` [PATCH v2 24/71] target/arm: Add ARM_CP_SME Richard Henderson
2022-06-07 20:32 ` [PATCH v2 25/71] target/arm: Add SVCR Richard Henderson
2022-06-09 15:25 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 26/71] target/arm: Add SMCR_ELx Richard Henderson
2022-06-07 20:32 ` [PATCH v2 27/71] target/arm: Add SMIDR_EL1, SMPRI_EL1, SMPRIMAP_EL2 Richard Henderson
2022-06-07 20:32 ` [PATCH v2 28/71] target/arm: Add PSTATE.{SM,ZA} to TB flags Richard Henderson
2022-06-07 20:32 ` [PATCH v2 29/71] target/arm: Add the SME ZA storage to CPUARMState Richard Henderson
2022-06-10 12:59 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 30/71] target/arm: Implement SMSTART, SMSTOP Richard Henderson
2022-06-07 20:32 ` [PATCH v2 31/71] target/arm: Move error for sve%d property to arm_cpu_sve_finalize Richard Henderson
2022-06-09 15:29 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 32/71] target/arm: Create ARMVQMap Richard Henderson
2022-06-09 15:30 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 33/71] target/arm: Generalize cpu_arm_{get,set}_vq Richard Henderson
2022-06-09 15:30 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 34/71] target/arm: Generalize cpu_arm_{get, set}_default_vec_len Richard Henderson
2022-06-09 15:31 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 35/71] target/arm: Move arm_cpu_*_finalize to internals.h Richard Henderson
2022-06-09 15:31 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 36/71] target/arm: Unexport aarch64_add_*_properties Richard Henderson
2022-06-09 15:32 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 37/71] target/arm: Add cpu properties for SME Richard Henderson
2022-06-09 15:32 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 38/71] target/arm: Introduce sve_vqm1_for_el_sm Richard Henderson
2022-06-09 15:33 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 39/71] target/arm: Add SVL to TB flags Richard Henderson
2022-06-09 15:33 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 40/71] target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h Richard Henderson
2022-06-09 15:34 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 41/71] target/arm: Add infrastructure for disas_sme Richard Henderson
2022-06-09 15:35 ` Peter Maydell
2022-06-09 22:58 ` Richard Henderson
2022-06-10 9:02 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 42/71] target/arm: Trap AdvSIMD usage when Streaming SVE is active Richard Henderson
2022-06-07 20:32 ` [PATCH v2 43/71] target/arm: Implement SME RDSVL, ADDSVL, ADDSPL Richard Henderson
2022-06-07 20:32 ` [PATCH v2 44/71] target/arm: Implement SME ZERO Richard Henderson
2022-06-07 20:32 ` [PATCH v2 45/71] target/arm: Implement SME MOVA Richard Henderson
2022-06-07 20:32 ` [PATCH v2 46/71] target/arm: Implement SME LD1, ST1 Richard Henderson
2022-06-07 20:32 ` [PATCH v2 47/71] target/arm: Export unpredicated ld/st from translate-sve.c Richard Henderson
2022-06-07 20:32 ` [PATCH v2 48/71] target/arm: Implement SME LDR, STR Richard Henderson
2022-06-07 20:32 ` [PATCH v2 49/71] target/arm: Implement SME ADDHA, ADDVA Richard Henderson
2022-06-07 20:32 ` [PATCH v2 50/71] target/arm: Implement FMOPA, FMOPS (non-widening) Richard Henderson
2022-06-07 20:32 ` [PATCH v2 51/71] target/arm: Implement BFMOPA, BFMOPS Richard Henderson
2022-06-07 20:32 ` [PATCH v2 52/71] target/arm: Implement FMOPA, FMOPS (widening) Richard Henderson
2022-06-07 20:32 ` [PATCH v2 53/71] target/arm: Implement SME integer outer product Richard Henderson
2022-06-07 20:32 ` [PATCH v2 54/71] target/arm: Implement PSEL Richard Henderson
2022-06-07 20:32 ` [PATCH v2 55/71] target/arm: Implement REVD Richard Henderson
2022-06-07 20:32 ` [PATCH v2 56/71] target/arm: Implement SCLAMP, UCLAMP Richard Henderson
2022-06-07 20:32 ` [PATCH v2 57/71] target/arm: Reset streaming sve state on exception boundaries Richard Henderson
2022-06-07 20:32 ` [PATCH v2 58/71] target/arm: Enable SME for -cpu max Richard Henderson
2022-06-07 20:32 ` [PATCH v2 59/71] linux-user/aarch64: Clear tpidr2_el0 if CLONE_SETTLS Richard Henderson
2022-06-07 20:32 ` [PATCH v2 60/71] linux-user/aarch64: Reset PSTATE.SM on syscalls Richard Henderson
2022-06-07 20:32 ` [PATCH v2 61/71] linux-user/aarch64: Add SM bit to SVE signal context Richard Henderson
2022-06-07 20:32 ` [PATCH v2 62/71] linux-user/aarch64: Tidy target_restore_sigframe error return Richard Henderson
2022-06-07 20:32 ` [PATCH v2 63/71] linux-user/aarch64: Do not allow duplicate or short sve records Richard Henderson
2022-06-07 20:32 ` [PATCH v2 64/71] linux-user/aarch64: Verify extra record lock succeeded Richard Henderson
2022-06-07 20:33 ` [PATCH v2 65/71] linux-user/aarch64: Move sve record checks into restore Richard Henderson
2022-06-07 20:33 ` [PATCH v2 66/71] linux-user/aarch64: Implement SME signal handling Richard Henderson
2022-06-07 20:33 ` [PATCH v2 67/71] linux-user: Rename sve prctls Richard Henderson
2022-06-07 20:33 ` [PATCH v2 68/71] linux-user/aarch64: Implement PR_SME_GET_VL, PR_SME_SET_VL Richard Henderson
2022-06-07 20:33 ` [PATCH v2 69/71] target/arm: Only set ZEN in reset if SVE present Richard Henderson
2022-06-07 20:33 ` [PATCH v2 70/71] target/arm: Enable SME for user-only Richard Henderson
2022-06-07 20:33 ` [PATCH v2 71/71] linux-user/aarch64: Add SME related hwcap entries Richard Henderson
2022-06-09 15:22 ` [PATCH v2 00/71] target/arm: Scalable Matrix Extension Peter Maydell
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