From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [PATCH v2 49/71] target/arm: Implement SME ADDHA, ADDVA
Date: Tue, 7 Jun 2022 13:32:44 -0700 [thread overview]
Message-ID: <20220607203306.657998-50-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220607203306.657998-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper-sme.h | 5 +++
target/arm/sme_helper.c | 90 ++++++++++++++++++++++++++++++++++++++
target/arm/translate-sme.c | 30 +++++++++++++
target/arm/sme.decode | 11 +++++
4 files changed, 136 insertions(+)
diff --git a/target/arm/helper-sme.h b/target/arm/helper-sme.h
index 5cca01f372..6f0fce7e2c 100644
--- a/target/arm/helper-sme.h
+++ b/target/arm/helper-sme.h
@@ -114,3 +114,8 @@ DEF_HELPER_FLAGS_5(sme_st1q_be_h_mte, TCG_CALL_NO_WG, void, env, ptr, ptr, tl, i
DEF_HELPER_FLAGS_5(sme_st1q_le_h_mte, TCG_CALL_NO_WG, void, env, ptr, ptr, tl, i32)
DEF_HELPER_FLAGS_5(sme_st1q_be_v_mte, TCG_CALL_NO_WG, void, env, ptr, ptr, tl, i32)
DEF_HELPER_FLAGS_5(sme_st1q_le_v_mte, TCG_CALL_NO_WG, void, env, ptr, ptr, tl, i32)
+
+DEF_HELPER_FLAGS_5(sme_addha_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_5(sme_addva_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_5(sme_addha_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_5(sme_addva_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c
index 0c51fbbd49..799e44c047 100644
--- a/target/arm/sme_helper.c
+++ b/target/arm/sme_helper.c
@@ -807,3 +807,93 @@ DO_ST(q, _be, MO_128)
DO_ST(q, _le, MO_128)
#undef DO_ST
+
+void HELPER(sme_addha_s)(void *vzda, void *vzn, void *vpn,
+ void *vpm, uint32_t desc)
+{
+ intptr_t row, col, oprsz = simd_oprsz(desc) / 4;
+ uint64_t *pn = vpn, *pm = vpm;
+ uint32_t * restrict zda = vzda, * restrict zn = vzn;
+
+ for (row = 0; row < oprsz; ) {
+ uint64_t pa = pn[row >> 4];
+ do {
+ if (pa & 1) {
+ for (col = 0; col < oprsz; ) {
+ uint64_t pb = pm[col >> 4];
+ do {
+ if (pb & 1) {
+ zda[row * sizeof(ARMVectorReg) + col] += zn[col];
+ }
+ pb >>= 4;
+ } while (++col & 15);
+ }
+ }
+ pa >>= 4;
+ } while (++row & 15);
+ }
+}
+
+void HELPER(sme_addha_d)(void *vzda, void *vzn, void *vpn,
+ void *vpm, uint32_t desc)
+{
+ intptr_t row, col, oprsz = simd_oprsz(desc) / 8;
+ uint8_t *pn = vpn, *pm = vpm;
+ uint64_t * restrict zda = vzda, * restrict zn = vzn;
+
+ for (row = 0; row < oprsz; ++row) {
+ if (pn[H1(row)] & 1) {
+ for (col = 0; col < oprsz; ++col) {
+ if (pm[H1(col)] & 1) {
+ zda[row * sizeof(ARMVectorReg) + col] += zn[col];
+ }
+ }
+ }
+ }
+}
+
+void HELPER(sme_addva_s)(void *vzda, void *vzn, void *vpn,
+ void *vpm, uint32_t desc)
+{
+ intptr_t row, col, oprsz = simd_oprsz(desc) / 4;
+ uint64_t *pn = vpn, *pm = vpm;
+ uint32_t * restrict zda = vzda, * restrict zn = vzn;
+
+ for (row = 0; row < oprsz; ) {
+ uint64_t pa = pn[row >> 4];
+ do {
+ if (pa & 1) {
+ uint32_t zn_row = zn[row];
+ for (col = 0; col < oprsz; ) {
+ uint64_t pb = pm[col >> 4];
+ do {
+ if (pb & 1) {
+ zda[row * sizeof(ARMVectorReg) + col] += zn_row;
+ }
+ pb >>= 4;
+ } while (++col & 15);
+ }
+ }
+ pa >>= 4;
+ } while (++row & 15);
+ }
+}
+
+void HELPER(sme_addva_d)(void *vzda, void *vzn, void *vpn,
+ void *vpm, uint32_t desc)
+{
+ intptr_t row, col, oprsz = simd_oprsz(desc) / 8;
+ uint8_t *pn = vpn, *pm = vpm;
+ uint64_t * restrict zda = vzda, * restrict zn = vzn;
+
+ for (row = 0; row < oprsz; ++row) {
+ if (pn[H1(row)] & 1) {
+ uint64_t zn_row = zn[row];
+ for (col = 0; col < oprsz; ++col) {
+ if (pm[H1(col)] & 1) {
+ zda[row * sizeof(ARMVectorReg) + col] += zn_row;
+ }
+ }
+ }
+ }
+}
diff --git a/target/arm/translate-sme.c b/target/arm/translate-sme.c
index c3e544d69c..e9676b2415 100644
--- a/target/arm/translate-sme.c
+++ b/target/arm/translate-sme.c
@@ -243,3 +243,33 @@ static bool do_ldst_r(DisasContext *s, arg_ldstr *a, GenLdStR *fn)
TRANS_FEAT(LDR, aa64_sme, do_ldst_r, a, gen_sve_ldr)
TRANS_FEAT(STR, aa64_sme, do_ldst_r, a, gen_sve_str)
+
+static bool do_adda(DisasContext *s, arg_adda *a, MemOp esz,
+ gen_helper_gvec_4 *fn)
+{
+ uint32_t desc = simd_desc(s->svl, s->svl, 0);
+ TCGv_ptr za, zn, pn, pm;
+
+ if (!sme_smza_enabled_check(s)) {
+ return true;
+ }
+
+ /* Sum XZR+zad to find ZAd. */
+ za = get_tile_rowcol(s, esz, 31, a->zad, false);
+ zn = vec_full_reg_ptr(s, a->zn);
+ pn = pred_full_reg_ptr(s, a->pn);
+ pm = pred_full_reg_ptr(s, a->pm);
+
+ fn(za, zn, pn, pm, tcg_constant_i32(desc));
+
+ tcg_temp_free_ptr(za);
+ tcg_temp_free_ptr(zn);
+ tcg_temp_free_ptr(pn);
+ tcg_temp_free_ptr(pm);
+ return true;
+}
+
+TRANS_FEAT(ADDHA_s, aa64_sme, do_adda, a, MO_32, gen_helper_sme_addha_s)
+TRANS_FEAT(ADDVA_s, aa64_sme, do_adda, a, MO_32, gen_helper_sme_addva_s)
+TRANS_FEAT(ADDHA_d, aa64_sme_i16i64, do_adda, a, MO_64, gen_helper_sme_addha_d)
+TRANS_FEAT(ADDVA_d, aa64_sme_i16i64, do_adda, a, MO_64, gen_helper_sme_addva_d)
diff --git a/target/arm/sme.decode b/target/arm/sme.decode
index f1ebd857a5..8cb6c4053c 100644
--- a/target/arm/sme.decode
+++ b/target/arm/sme.decode
@@ -53,3 +53,14 @@ LDST1 1110000 111 st:1 rm:5 v:1 .. pg:3 rn:5 0 za_imm:4 \
LDR 1110000 100 0 000000 .. 000 ..... 0 .... @ldstr
STR 1110000 100 1 000000 .. 000 ..... 0 .... @ldstr
+
+### SME Add Vector to Array
+
+&adda zad zn pm pn
+@adda_32 ........ .. ..... . pm:3 pn:3 zn:5 ... zad:2 &adda
+@adda_64 ........ .. ..... . pm:3 pn:3 zn:5 .. zad:3 &adda
+
+ADDHA_s 11000000 10 01000 0 ... ... ..... 000 .. @adda_32
+ADDVA_s 11000000 10 01000 1 ... ... ..... 000 .. @adda_32
+ADDHA_d 11000000 11 01000 0 ... ... ..... 00 ... @adda_64
+ADDVA_d 11000000 11 01000 1 ... ... ..... 00 ... @adda_64
--
2.34.1
next prev parent reply other threads:[~2022-06-07 21:38 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-07 20:31 [PATCH v2 00/71] target/arm: Scalable Matrix Extension Richard Henderson
2022-06-07 20:31 ` [PATCH v2 01/71] target/arm: Rename TBFLAG_A64 ZCR_LEN to VL Richard Henderson
2022-06-07 20:31 ` [PATCH v2 02/71] linux-user/aarch64: Introduce sve_vq Richard Henderson
2022-06-07 20:31 ` [PATCH v2 03/71] target/arm: Remove route_to_el2 check from sve_exception_el Richard Henderson
2022-06-07 20:31 ` [PATCH v2 04/71] target/arm: Remove fp checks " Richard Henderson
2022-06-07 20:32 ` [PATCH v2 05/71] target/arm: Add el_is_in_host Richard Henderson
2022-06-07 20:32 ` [PATCH v2 06/71] target/arm: Use el_is_in_host for sve_zcr_len_for_el Richard Henderson
2022-06-07 20:32 ` [PATCH v2 07/71] target/arm: Use el_is_in_host for sve_exception_el Richard Henderson
2022-06-07 20:32 ` [PATCH v2 08/71] target/arm: Hoist arm_is_el2_enabled check in sve_exception_el Richard Henderson
2022-06-07 20:32 ` [PATCH v2 09/71] target/arm: Do not use aarch64_sve_zcr_get_valid_len in reset Richard Henderson
2022-06-07 20:32 ` [PATCH v2 10/71] target/arm: Merge aarch64_sve_zcr_get_valid_len into caller Richard Henderson
2022-06-07 20:32 ` [PATCH v2 11/71] target/arm: Use uint32_t instead of bitmap for sve vq's Richard Henderson
2022-06-07 20:32 ` [PATCH v2 12/71] target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el Richard Henderson
2022-06-07 20:32 ` [PATCH v2 13/71] target/arm: Split out load/store primitives to sve_ldst_internal.h Richard Henderson
2022-06-07 20:32 ` [PATCH v2 14/71] target/arm: Export sve contiguous ldst support functions Richard Henderson
2022-06-07 20:32 ` [PATCH v2 15/71] target/arm: Move expand_pred_b to vec_internal.h Richard Henderson
2022-06-07 20:32 ` [PATCH v2 16/71] target/arm: Use expand_pred_b in mve_helper.c Richard Henderson
2022-06-07 20:32 ` [PATCH v2 17/71] target/arm: Move expand_pred_h to vec_internal.h Richard Henderson
2022-06-07 20:32 ` [PATCH v2 18/71] target/arm: Export bfdotadd from vec_helper.c Richard Henderson
2022-06-07 20:32 ` [PATCH v2 19/71] target/arm: Add isar_feature_aa64_sme Richard Henderson
2022-06-07 20:32 ` [PATCH v2 20/71] target/arm: Add ID_AA64SMFR0_EL1 Richard Henderson
2022-06-07 20:32 ` [PATCH v2 21/71] target/arm: Implement TPIDR2_EL0 Richard Henderson
2022-06-09 15:24 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 22/71] target/arm: Add SMEEXC_EL to TB flags Richard Henderson
2022-06-07 20:32 ` [PATCH v2 23/71] target/arm: Add syn_smetrap Richard Henderson
2022-06-07 20:32 ` [PATCH v2 24/71] target/arm: Add ARM_CP_SME Richard Henderson
2022-06-07 20:32 ` [PATCH v2 25/71] target/arm: Add SVCR Richard Henderson
2022-06-09 15:25 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 26/71] target/arm: Add SMCR_ELx Richard Henderson
2022-06-07 20:32 ` [PATCH v2 27/71] target/arm: Add SMIDR_EL1, SMPRI_EL1, SMPRIMAP_EL2 Richard Henderson
2022-06-07 20:32 ` [PATCH v2 28/71] target/arm: Add PSTATE.{SM,ZA} to TB flags Richard Henderson
2022-06-07 20:32 ` [PATCH v2 29/71] target/arm: Add the SME ZA storage to CPUARMState Richard Henderson
2022-06-10 12:59 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 30/71] target/arm: Implement SMSTART, SMSTOP Richard Henderson
2022-06-07 20:32 ` [PATCH v2 31/71] target/arm: Move error for sve%d property to arm_cpu_sve_finalize Richard Henderson
2022-06-09 15:29 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 32/71] target/arm: Create ARMVQMap Richard Henderson
2022-06-09 15:30 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 33/71] target/arm: Generalize cpu_arm_{get,set}_vq Richard Henderson
2022-06-09 15:30 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 34/71] target/arm: Generalize cpu_arm_{get, set}_default_vec_len Richard Henderson
2022-06-09 15:31 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 35/71] target/arm: Move arm_cpu_*_finalize to internals.h Richard Henderson
2022-06-09 15:31 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 36/71] target/arm: Unexport aarch64_add_*_properties Richard Henderson
2022-06-09 15:32 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 37/71] target/arm: Add cpu properties for SME Richard Henderson
2022-06-09 15:32 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 38/71] target/arm: Introduce sve_vqm1_for_el_sm Richard Henderson
2022-06-09 15:33 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 39/71] target/arm: Add SVL to TB flags Richard Henderson
2022-06-09 15:33 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 40/71] target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h Richard Henderson
2022-06-09 15:34 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 41/71] target/arm: Add infrastructure for disas_sme Richard Henderson
2022-06-09 15:35 ` Peter Maydell
2022-06-09 22:58 ` Richard Henderson
2022-06-10 9:02 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 42/71] target/arm: Trap AdvSIMD usage when Streaming SVE is active Richard Henderson
2022-06-07 20:32 ` [PATCH v2 43/71] target/arm: Implement SME RDSVL, ADDSVL, ADDSPL Richard Henderson
2022-06-07 20:32 ` [PATCH v2 44/71] target/arm: Implement SME ZERO Richard Henderson
2022-06-07 20:32 ` [PATCH v2 45/71] target/arm: Implement SME MOVA Richard Henderson
2022-06-07 20:32 ` [PATCH v2 46/71] target/arm: Implement SME LD1, ST1 Richard Henderson
2022-06-07 20:32 ` [PATCH v2 47/71] target/arm: Export unpredicated ld/st from translate-sve.c Richard Henderson
2022-06-07 20:32 ` [PATCH v2 48/71] target/arm: Implement SME LDR, STR Richard Henderson
2022-06-07 20:32 ` Richard Henderson [this message]
2022-06-07 20:32 ` [PATCH v2 50/71] target/arm: Implement FMOPA, FMOPS (non-widening) Richard Henderson
2022-06-07 20:32 ` [PATCH v2 51/71] target/arm: Implement BFMOPA, BFMOPS Richard Henderson
2022-06-07 20:32 ` [PATCH v2 52/71] target/arm: Implement FMOPA, FMOPS (widening) Richard Henderson
2022-06-07 20:32 ` [PATCH v2 53/71] target/arm: Implement SME integer outer product Richard Henderson
2022-06-07 20:32 ` [PATCH v2 54/71] target/arm: Implement PSEL Richard Henderson
2022-06-07 20:32 ` [PATCH v2 55/71] target/arm: Implement REVD Richard Henderson
2022-06-07 20:32 ` [PATCH v2 56/71] target/arm: Implement SCLAMP, UCLAMP Richard Henderson
2022-06-07 20:32 ` [PATCH v2 57/71] target/arm: Reset streaming sve state on exception boundaries Richard Henderson
2022-06-07 20:32 ` [PATCH v2 58/71] target/arm: Enable SME for -cpu max Richard Henderson
2022-06-07 20:32 ` [PATCH v2 59/71] linux-user/aarch64: Clear tpidr2_el0 if CLONE_SETTLS Richard Henderson
2022-06-07 20:32 ` [PATCH v2 60/71] linux-user/aarch64: Reset PSTATE.SM on syscalls Richard Henderson
2022-06-07 20:32 ` [PATCH v2 61/71] linux-user/aarch64: Add SM bit to SVE signal context Richard Henderson
2022-06-07 20:32 ` [PATCH v2 62/71] linux-user/aarch64: Tidy target_restore_sigframe error return Richard Henderson
2022-06-07 20:32 ` [PATCH v2 63/71] linux-user/aarch64: Do not allow duplicate or short sve records Richard Henderson
2022-06-07 20:32 ` [PATCH v2 64/71] linux-user/aarch64: Verify extra record lock succeeded Richard Henderson
2022-06-07 20:33 ` [PATCH v2 65/71] linux-user/aarch64: Move sve record checks into restore Richard Henderson
2022-06-07 20:33 ` [PATCH v2 66/71] linux-user/aarch64: Implement SME signal handling Richard Henderson
2022-06-07 20:33 ` [PATCH v2 67/71] linux-user: Rename sve prctls Richard Henderson
2022-06-07 20:33 ` [PATCH v2 68/71] linux-user/aarch64: Implement PR_SME_GET_VL, PR_SME_SET_VL Richard Henderson
2022-06-07 20:33 ` [PATCH v2 69/71] target/arm: Only set ZEN in reset if SVE present Richard Henderson
2022-06-07 20:33 ` [PATCH v2 70/71] target/arm: Enable SME for user-only Richard Henderson
2022-06-07 20:33 ` [PATCH v2 71/71] linux-user/aarch64: Add SME related hwcap entries Richard Henderson
2022-06-09 15:22 ` [PATCH v2 00/71] target/arm: Scalable Matrix Extension Peter Maydell
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