From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [PATCH v2 53/71] target/arm: Implement SME integer outer product
Date: Tue, 7 Jun 2022 13:32:48 -0700 [thread overview]
Message-ID: <20220607203306.657998-54-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220607203306.657998-1-richard.henderson@linaro.org>
This is SMOPA, SUMOPA, USMOPA_s, UMOPA, for both Int8 and Int16.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper-sme.h | 16 ++++++++
target/arm/sme_helper.c | 82 ++++++++++++++++++++++++++++++++++++++
target/arm/translate-sme.c | 14 +++++++
target/arm/sme.decode | 10 +++++
4 files changed, 122 insertions(+)
diff --git a/target/arm/helper-sme.h b/target/arm/helper-sme.h
index ecc957be14..31562551ee 100644
--- a/target/arm/helper-sme.h
+++ b/target/arm/helper-sme.h
@@ -128,3 +128,19 @@ DEF_HELPER_FLAGS_7(sme_fmopa_d, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_6(sme_bfmopa, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_smopa_s, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_umopa_s, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_sumopa_s, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_usmopa_s, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_smopa_d, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_umopa_d, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_sumopa_d, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_6(sme_usmopa_d, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, ptr, ptr, i32)
diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c
index 6863a204d4..f1c7e6ae56 100644
--- a/target/arm/sme_helper.c
+++ b/target/arm/sme_helper.c
@@ -1090,3 +1090,85 @@ void HELPER(sme_bfmopa)(void *vza, void *vzn, void *vzm, void *vpn,
} while (row & 15);
}
}
+
+typedef uint64_t IMOPFn(uint64_t, uint64_t, uint64_t, uint8_t, bool);
+
+static inline void do_imopa(uint64_t *za, uint64_t *zn, uint64_t *zm,
+ uint8_t *pn, uint8_t *pm,
+ uint32_t desc, IMOPFn *fn)
+{
+ intptr_t row, col, oprsz = simd_oprsz(desc) / 8;
+ bool neg = simd_data(desc);
+
+ for (row = 0; row < oprsz; ++row) {
+ uint8_t pa = pn[H1(row)];
+ uint64_t *za_row = &za[row * sizeof(ARMVectorReg)];
+ uint64_t n = zn[row];
+
+ for (col = 0; col < oprsz; ++col) {
+ uint8_t pb = pm[H1(col)];
+ uint64_t *a = &za_row[col];
+
+ *a = fn(n, zm[col], *a, pa & pb, neg);
+ }
+ }
+}
+
+#define DEF_IMOP_32(NAME, NTYPE, MTYPE) \
+static uint64_t NAME(uint64_t n, uint64_t m, uint64_t a, uint8_t p, bool neg) \
+{ \
+ uint32_t sum0 = 0, sum1 = 0; \
+ /* Apply P to N as a mask, making the inactive elements 0. */ \
+ n &= expand_pred_b(p); \
+ sum0 += (NTYPE)(n >> 0) * (MTYPE)(m >> 0); \
+ sum0 += (NTYPE)(n >> 8) * (MTYPE)(m >> 8); \
+ sum0 += (NTYPE)(n >> 16) * (MTYPE)(m >> 16); \
+ sum0 += (NTYPE)(n >> 24) * (MTYPE)(m >> 24); \
+ sum1 += (NTYPE)(n >> 32) * (MTYPE)(m >> 32); \
+ sum1 += (NTYPE)(n >> 40) * (MTYPE)(m >> 40); \
+ sum1 += (NTYPE)(n >> 48) * (MTYPE)(m >> 48); \
+ sum1 += (NTYPE)(n >> 56) * (MTYPE)(m >> 56); \
+ if (neg) { \
+ sum0 = (uint32_t)a - sum0, sum1 = (uint32_t)(a >> 32) - sum1; \
+ } else { \
+ sum0 = (uint32_t)a + sum0, sum1 = (uint32_t)(a >> 32) + sum1; \
+ } \
+ return ((uint64_t)sum1 << 32) | sum0; \
+}
+
+#define DEF_IMOP_64(NAME, NTYPE, MTYPE) \
+static uint64_t NAME(uint64_t n, uint64_t m, uint64_t a, uint8_t p, bool neg) \
+{ \
+ uint64_t sum = 0; \
+ /* Apply P to N as a mask, making the inactive elements 0. */ \
+ n &= expand_pred_h(p); \
+ sum += (NTYPE)(n >> 0) * (MTYPE)(m >> 0); \
+ sum += (NTYPE)(n >> 16) * (MTYPE)(m >> 16); \
+ sum += (NTYPE)(n >> 32) * (MTYPE)(m >> 32); \
+ sum += (NTYPE)(n >> 48) * (MTYPE)(m >> 48); \
+ return neg ? a - sum : a + sum; \
+}
+
+DEF_IMOP_32(smopa_s, int8_t, int8_t)
+DEF_IMOP_32(umopa_s, uint8_t, uint8_t)
+DEF_IMOP_32(sumopa_s, int8_t, uint8_t)
+DEF_IMOP_32(usmopa_s, uint8_t, int8_t)
+
+DEF_IMOP_64(smopa_d, int16_t, int16_t)
+DEF_IMOP_64(umopa_d, uint16_t, uint16_t)
+DEF_IMOP_64(sumopa_d, int16_t, uint16_t)
+DEF_IMOP_64(usmopa_d, uint16_t, int16_t)
+
+#define DEF_IMOPH(NAME) \
+ void HELPER(sme_##NAME)(void *vza, void *vzn, void *vzm, void *vpn, \
+ void *vpm, uint32_t desc) \
+ { do_imopa(vza, vzn, vzm, vpn, vpm, desc, NAME); }
+
+DEF_IMOPH(smopa_s)
+DEF_IMOPH(umopa_s)
+DEF_IMOPH(sumopa_s)
+DEF_IMOPH(usmopa_s)
+DEF_IMOPH(smopa_d)
+DEF_IMOPH(umopa_d)
+DEF_IMOPH(sumopa_d)
+DEF_IMOPH(usmopa_d)
diff --git a/target/arm/translate-sme.c b/target/arm/translate-sme.c
index 847f2274b1..4aa0aff25c 100644
--- a/target/arm/translate-sme.c
+++ b/target/arm/translate-sme.c
@@ -337,3 +337,17 @@ TRANS_FEAT(FMOPA_d, aa64_sme_f64f64, do_outprod_fpst,
/* TODO: FEAT_EBF16 */
TRANS_FEAT(BFMOPA, aa64_sme, do_outprod, a, MO_32, gen_helper_sme_bfmopa)
+
+TRANS_FEAT(SMOPA_s, aa64_sme, do_outprod, a, MO_32, gen_helper_sme_smopa_s)
+TRANS_FEAT(UMOPA_s, aa64_sme, do_outprod, a, MO_32, gen_helper_sme_umopa_s)
+TRANS_FEAT(SUMOPA_s, aa64_sme, do_outprod, a, MO_32, gen_helper_sme_sumopa_s)
+TRANS_FEAT(USMOPA_s, aa64_sme, do_outprod, a, MO_32, gen_helper_sme_usmopa_s)
+
+TRANS_FEAT(SMOPA_d, aa64_sme_i16i64, do_outprod,
+ a, MO_64, gen_helper_sme_smopa_d)
+TRANS_FEAT(UMOPA_d, aa64_sme_i16i64, do_outprod,
+ a, MO_64, gen_helper_sme_umopa_d)
+TRANS_FEAT(SUMOPA_d, aa64_sme_i16i64, do_outprod,
+ a, MO_64, gen_helper_sme_sumopa_d)
+TRANS_FEAT(USMOPA_d, aa64_sme_i16i64, do_outprod,
+ a, MO_64, gen_helper_sme_usmopa_d)
diff --git a/target/arm/sme.decode b/target/arm/sme.decode
index e8d27fd8a0..628804e37a 100644
--- a/target/arm/sme.decode
+++ b/target/arm/sme.decode
@@ -76,3 +76,13 @@ FMOPA_d 10000000 110 ..... ... ... ..... . 0 ... @op_64
BFMOPA 10000001 100 ..... ... ... ..... . 00 .. @op_32
FMOPA_h 10000001 101 ..... ... ... ..... . 00 .. @op_32
+
+SMOPA_s 1010000 0 10 0 ..... ... ... ..... . 00 .. @op_32
+SUMOPA_s 1010000 0 10 1 ..... ... ... ..... . 00 .. @op_32
+USMOPA_s 1010000 1 10 0 ..... ... ... ..... . 00 .. @op_32
+UMOPA_s 1010000 1 10 1 ..... ... ... ..... . 00 .. @op_32
+
+SMOPA_d 1010000 0 11 0 ..... ... ... ..... . 0 ... @op_64
+SUMOPA_d 1010000 0 11 1 ..... ... ... ..... . 0 ... @op_64
+USMOPA_d 1010000 1 11 0 ..... ... ... ..... . 0 ... @op_64
+UMOPA_d 1010000 1 11 1 ..... ... ... ..... . 0 ... @op_64
--
2.34.1
next prev parent reply other threads:[~2022-06-07 21:56 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-07 20:31 [PATCH v2 00/71] target/arm: Scalable Matrix Extension Richard Henderson
2022-06-07 20:31 ` [PATCH v2 01/71] target/arm: Rename TBFLAG_A64 ZCR_LEN to VL Richard Henderson
2022-06-07 20:31 ` [PATCH v2 02/71] linux-user/aarch64: Introduce sve_vq Richard Henderson
2022-06-07 20:31 ` [PATCH v2 03/71] target/arm: Remove route_to_el2 check from sve_exception_el Richard Henderson
2022-06-07 20:31 ` [PATCH v2 04/71] target/arm: Remove fp checks " Richard Henderson
2022-06-07 20:32 ` [PATCH v2 05/71] target/arm: Add el_is_in_host Richard Henderson
2022-06-07 20:32 ` [PATCH v2 06/71] target/arm: Use el_is_in_host for sve_zcr_len_for_el Richard Henderson
2022-06-07 20:32 ` [PATCH v2 07/71] target/arm: Use el_is_in_host for sve_exception_el Richard Henderson
2022-06-07 20:32 ` [PATCH v2 08/71] target/arm: Hoist arm_is_el2_enabled check in sve_exception_el Richard Henderson
2022-06-07 20:32 ` [PATCH v2 09/71] target/arm: Do not use aarch64_sve_zcr_get_valid_len in reset Richard Henderson
2022-06-07 20:32 ` [PATCH v2 10/71] target/arm: Merge aarch64_sve_zcr_get_valid_len into caller Richard Henderson
2022-06-07 20:32 ` [PATCH v2 11/71] target/arm: Use uint32_t instead of bitmap for sve vq's Richard Henderson
2022-06-07 20:32 ` [PATCH v2 12/71] target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el Richard Henderson
2022-06-07 20:32 ` [PATCH v2 13/71] target/arm: Split out load/store primitives to sve_ldst_internal.h Richard Henderson
2022-06-07 20:32 ` [PATCH v2 14/71] target/arm: Export sve contiguous ldst support functions Richard Henderson
2022-06-07 20:32 ` [PATCH v2 15/71] target/arm: Move expand_pred_b to vec_internal.h Richard Henderson
2022-06-07 20:32 ` [PATCH v2 16/71] target/arm: Use expand_pred_b in mve_helper.c Richard Henderson
2022-06-07 20:32 ` [PATCH v2 17/71] target/arm: Move expand_pred_h to vec_internal.h Richard Henderson
2022-06-07 20:32 ` [PATCH v2 18/71] target/arm: Export bfdotadd from vec_helper.c Richard Henderson
2022-06-07 20:32 ` [PATCH v2 19/71] target/arm: Add isar_feature_aa64_sme Richard Henderson
2022-06-07 20:32 ` [PATCH v2 20/71] target/arm: Add ID_AA64SMFR0_EL1 Richard Henderson
2022-06-07 20:32 ` [PATCH v2 21/71] target/arm: Implement TPIDR2_EL0 Richard Henderson
2022-06-09 15:24 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 22/71] target/arm: Add SMEEXC_EL to TB flags Richard Henderson
2022-06-07 20:32 ` [PATCH v2 23/71] target/arm: Add syn_smetrap Richard Henderson
2022-06-07 20:32 ` [PATCH v2 24/71] target/arm: Add ARM_CP_SME Richard Henderson
2022-06-07 20:32 ` [PATCH v2 25/71] target/arm: Add SVCR Richard Henderson
2022-06-09 15:25 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 26/71] target/arm: Add SMCR_ELx Richard Henderson
2022-06-07 20:32 ` [PATCH v2 27/71] target/arm: Add SMIDR_EL1, SMPRI_EL1, SMPRIMAP_EL2 Richard Henderson
2022-06-07 20:32 ` [PATCH v2 28/71] target/arm: Add PSTATE.{SM,ZA} to TB flags Richard Henderson
2022-06-07 20:32 ` [PATCH v2 29/71] target/arm: Add the SME ZA storage to CPUARMState Richard Henderson
2022-06-10 12:59 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 30/71] target/arm: Implement SMSTART, SMSTOP Richard Henderson
2022-06-07 20:32 ` [PATCH v2 31/71] target/arm: Move error for sve%d property to arm_cpu_sve_finalize Richard Henderson
2022-06-09 15:29 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 32/71] target/arm: Create ARMVQMap Richard Henderson
2022-06-09 15:30 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 33/71] target/arm: Generalize cpu_arm_{get,set}_vq Richard Henderson
2022-06-09 15:30 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 34/71] target/arm: Generalize cpu_arm_{get, set}_default_vec_len Richard Henderson
2022-06-09 15:31 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 35/71] target/arm: Move arm_cpu_*_finalize to internals.h Richard Henderson
2022-06-09 15:31 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 36/71] target/arm: Unexport aarch64_add_*_properties Richard Henderson
2022-06-09 15:32 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 37/71] target/arm: Add cpu properties for SME Richard Henderson
2022-06-09 15:32 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 38/71] target/arm: Introduce sve_vqm1_for_el_sm Richard Henderson
2022-06-09 15:33 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 39/71] target/arm: Add SVL to TB flags Richard Henderson
2022-06-09 15:33 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 40/71] target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h Richard Henderson
2022-06-09 15:34 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 41/71] target/arm: Add infrastructure for disas_sme Richard Henderson
2022-06-09 15:35 ` Peter Maydell
2022-06-09 22:58 ` Richard Henderson
2022-06-10 9:02 ` Peter Maydell
2022-06-07 20:32 ` [PATCH v2 42/71] target/arm: Trap AdvSIMD usage when Streaming SVE is active Richard Henderson
2022-06-07 20:32 ` [PATCH v2 43/71] target/arm: Implement SME RDSVL, ADDSVL, ADDSPL Richard Henderson
2022-06-07 20:32 ` [PATCH v2 44/71] target/arm: Implement SME ZERO Richard Henderson
2022-06-07 20:32 ` [PATCH v2 45/71] target/arm: Implement SME MOVA Richard Henderson
2022-06-07 20:32 ` [PATCH v2 46/71] target/arm: Implement SME LD1, ST1 Richard Henderson
2022-06-07 20:32 ` [PATCH v2 47/71] target/arm: Export unpredicated ld/st from translate-sve.c Richard Henderson
2022-06-07 20:32 ` [PATCH v2 48/71] target/arm: Implement SME LDR, STR Richard Henderson
2022-06-07 20:32 ` [PATCH v2 49/71] target/arm: Implement SME ADDHA, ADDVA Richard Henderson
2022-06-07 20:32 ` [PATCH v2 50/71] target/arm: Implement FMOPA, FMOPS (non-widening) Richard Henderson
2022-06-07 20:32 ` [PATCH v2 51/71] target/arm: Implement BFMOPA, BFMOPS Richard Henderson
2022-06-07 20:32 ` [PATCH v2 52/71] target/arm: Implement FMOPA, FMOPS (widening) Richard Henderson
2022-06-07 20:32 ` Richard Henderson [this message]
2022-06-07 20:32 ` [PATCH v2 54/71] target/arm: Implement PSEL Richard Henderson
2022-06-07 20:32 ` [PATCH v2 55/71] target/arm: Implement REVD Richard Henderson
2022-06-07 20:32 ` [PATCH v2 56/71] target/arm: Implement SCLAMP, UCLAMP Richard Henderson
2022-06-07 20:32 ` [PATCH v2 57/71] target/arm: Reset streaming sve state on exception boundaries Richard Henderson
2022-06-07 20:32 ` [PATCH v2 58/71] target/arm: Enable SME for -cpu max Richard Henderson
2022-06-07 20:32 ` [PATCH v2 59/71] linux-user/aarch64: Clear tpidr2_el0 if CLONE_SETTLS Richard Henderson
2022-06-07 20:32 ` [PATCH v2 60/71] linux-user/aarch64: Reset PSTATE.SM on syscalls Richard Henderson
2022-06-07 20:32 ` [PATCH v2 61/71] linux-user/aarch64: Add SM bit to SVE signal context Richard Henderson
2022-06-07 20:32 ` [PATCH v2 62/71] linux-user/aarch64: Tidy target_restore_sigframe error return Richard Henderson
2022-06-07 20:32 ` [PATCH v2 63/71] linux-user/aarch64: Do not allow duplicate or short sve records Richard Henderson
2022-06-07 20:32 ` [PATCH v2 64/71] linux-user/aarch64: Verify extra record lock succeeded Richard Henderson
2022-06-07 20:33 ` [PATCH v2 65/71] linux-user/aarch64: Move sve record checks into restore Richard Henderson
2022-06-07 20:33 ` [PATCH v2 66/71] linux-user/aarch64: Implement SME signal handling Richard Henderson
2022-06-07 20:33 ` [PATCH v2 67/71] linux-user: Rename sve prctls Richard Henderson
2022-06-07 20:33 ` [PATCH v2 68/71] linux-user/aarch64: Implement PR_SME_GET_VL, PR_SME_SET_VL Richard Henderson
2022-06-07 20:33 ` [PATCH v2 69/71] target/arm: Only set ZEN in reset if SVE present Richard Henderson
2022-06-07 20:33 ` [PATCH v2 70/71] target/arm: Enable SME for user-only Richard Henderson
2022-06-07 20:33 ` [PATCH v2 71/71] linux-user/aarch64: Add SME related hwcap entries Richard Henderson
2022-06-09 15:22 ` [PATCH v2 00/71] target/arm: Scalable Matrix Extension Peter Maydell
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