From: Bin Meng <bmeng.cn@gmail.com>
To: Alistair Francis <alistair.francis@wdc.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Subject: [PATCH 3/3] target/riscv: Skip parsing extensions from properties for KVM
Date: Thu, 9 Jun 2022 09:07:24 +0800 [thread overview]
Message-ID: <20220609010724.104033-3-bmeng.cn@gmail.com> (raw)
In-Reply-To: <20220609010724.104033-1-bmeng.cn@gmail.com>
When running with accel=kvm, the extensions are actually told by
KVM, so let's skip the parsing logic from properties for KVM.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
target/riscv/cpu.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 61d1737741..ff911017c3 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -581,8 +581,11 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
}
assert(env->misa_mxl_max == env->misa_mxl);
- /* If only MISA_EXT is unset for misa, then set it from properties */
- if (env->misa_ext == 0) {
+ /*
+ * If only MISA_EXT is unset for misa, then set it from properties.
+ * For KVM, misa is told by KVM so properties are ignored.
+ */
+ if (!kvm_enabled() && env->misa_ext == 0) {
uint32_t ext = 0;
/* Do some ISA extension error checking */
--
2.34.1
next prev parent reply other threads:[~2022-06-09 1:12 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-09 1:07 [PATCH 1/3] target/riscv: Remove the redundant initialization of env->misa_mxl Bin Meng
2022-06-09 1:07 ` [PATCH 2/3] target/riscv: kvm: Set env->misa_ext_mask to the supported value Bin Meng
2022-06-13 0:34 ` Alistair Francis
2022-06-09 1:07 ` Bin Meng [this message]
2022-06-13 0:36 ` [PATCH 3/3] target/riscv: Skip parsing extensions from properties for KVM Alistair Francis
2022-06-13 0:32 ` [PATCH 1/3] target/riscv: Remove the redundant initialization of env->misa_mxl Alistair Francis
2022-06-13 12:30 ` Bin Meng
2022-06-16 2:33 ` Alistair Francis
2022-06-16 2:41 ` Bin Meng
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