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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id j38-20020a05600c1c2600b0039c7f790f6asm5522809wms.30.2022.06.16.04.38.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jun 2022 04:38:17 -0700 (PDT) Date: Thu, 16 Jun 2022 13:38:16 +0200 From: Igor Mammedov To: Robert Hoo Cc: mst@redhat.com, xiaoguangrong.eric@gmail.com, ani@anisinha.ca, dan.j.williams@intel.com, jingqi.liu@intel.com, qemu-devel@nongnu.org, robert.hu@intel.com Subject: Re: [QEMU PATCH v2 3/6] acpi/nvdimm: NVDIMM _DSM Spec supports revision 2 Message-ID: <20220616133816.74cb2eb7@redhat.com> In-Reply-To: <20220530034047.730356-4-robert.hu@linux.intel.com> References: <20220530034047.730356-1-robert.hu@linux.intel.com> <20220530034047.730356-4-robert.hu@linux.intel.com> X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=170.10.129.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, 30 May 2022 11:40:44 +0800 Robert Hoo wrote: > The Intel Optane PMem DSM Interface, Version 2.0 [1], is the up-to-date > spec for NVDIMM _DSM definition, which supports revision_id =3D=3D 2. >=20 > Nevertheless, Rev.2 of NVDIMM _DSM has no functional change on those Label > Data _DSM Functions, which are the only ones implemented for vNVDIMM. > So, simple change to support this revision_id =3D=3D 2 case. >=20 > [1] https://pmem.io/documents/IntelOptanePMem_DSM_Interface-V2.0.pdf pls enumerate functions that QEMU implement and that are supported by rev= =3D2, do we really need rev2 ? also don't we need make sure that rev1 only function are excluded? /spec above says, functions 3-6 are deprecated and limited to rev1 only/ " Warning: This function has been deprecated in preference to the ACPI 6.2 _L= SW (Label Storage Write) NVDIMM Device Interface and is only supported with Arg1 =E2=80=93 Revision = Id =3D 1. It is included here for backwards compatibility with existing Arg1 - Revision Id =3D 1 implementati= ons. " >=20 > Signed-off-by: Robert Hoo > Reviewed-by: Jingqi Liu > --- > hw/acpi/nvdimm.c | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) >=20 > diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c > index 0ab247a870..59b42afcf1 100644 > --- a/hw/acpi/nvdimm.c > +++ b/hw/acpi/nvdimm.c > @@ -849,9 +849,13 @@ nvdimm_dsm_write(void *opaque, hwaddr addr, uint64_t= val, unsigned size) > nvdimm_debug("Revision 0x%x Handler 0x%x Function 0x%x.\n", in->revi= sion, > in->handle, in->function); > =20 > - if (in->revision !=3D 0x1 /* Currently we only support DSM Spec Rev1= . */) { > - nvdimm_debug("Revision 0x%x is not supported, expect 0x%x.\n", > - in->revision, 0x1); > + /* > + * Current NVDIMM _DSM Spec supports Rev1 and Rev2 > + * Intel=C2=AE OptanePersistent Memory Module DSM Interface, Revisio= n 2.0 > + */ > + if (in->revision !=3D 0x1 && in->revision !=3D 0x2) { > + nvdimm_debug("Revision 0x%x is not supported, expect 0x1 or 0x2.= \n", > + in->revision); > nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_UNSUPPORT, dsm_mem_a= ddr); > goto exit; > }