From: "Reviewed-by: Igor Mammedov" <imammedo@redhat.com>
To: Joao Martins <joao.m.martins@oracle.com>
Cc: qemu-devel@nongnu.org, Eduardo Habkost <eduardo@habkost.net>,
"Michael S. Tsirkin" <mst@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Daniel Jordan <daniel.m.jordan@oracle.com>,
David Edmondson <david.edmondson@oracle.com>,
Alex Williamson <alex.williamson@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>, Ani Sinha <ani@anisinha.ca>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: Re: [PATCH v5 2/5] i386/pc: create pci-host qdev prior to pc_memory_init()
Date: Thu, 16 Jun 2022 15:21:51 +0200 [thread overview]
Message-ID: <20220616152151.42d6140a@redhat.com> (raw)
In-Reply-To: <20220520104532.9816-3-joao.m.martins@oracle.com>
On Fri, 20 May 2022 11:45:29 +0100
Joao Martins <joao.m.martins@oracle.com> wrote:
> At the start of pc_memory_init() we usually pass a range of
> 0..UINT64_MAX as pci_memory, when really its 2G (i440fx) or
> 32G (q35). To get the real user value, we need to get pci-host
> passed property for default pci_hole64_size. Thus to get that,
> create the qdev prior to memory init to better make estimations
> on max used/phys addr.
>
> This is in preparation to determine that host-phys-bits are
> enough and also for pci-hole64-size to be considered to relocate
> ram-above-4g to be at 1T (on AMD platforms).
with comments below fixed
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
> ---
> hw/i386/pc_piix.c | 5 ++++-
> hw/i386/pc_q35.c | 6 +++---
> hw/pci-host/i440fx.c | 3 +--
> include/hw/pci-host/i440fx.h | 2 +-
> 4 files changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
> index 578e537b3525..12d4a279c793 100644
> --- a/hw/i386/pc_piix.c
> +++ b/hw/i386/pc_piix.c
> @@ -91,6 +91,7 @@ static void pc_init1(MachineState *machine,
> MemoryRegion *pci_memory;
> MemoryRegion *rom_memory;
> ram_addr_t lowmem;
> + DeviceState *i440fx_dev;
>
> /*
> * Calculate ram split, for memory below and above 4G. It's a bit
> @@ -164,9 +165,11 @@ static void pc_init1(MachineState *machine,
> pci_memory = g_new(MemoryRegion, 1);
> memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
> rom_memory = pci_memory;
> + i440fx_dev = qdev_new(host_type);
> } else {
> pci_memory = NULL;
> rom_memory = system_memory;
> + i440fx_dev = NULL;
> }
>
> pc_guest_info_init(pcms);
> @@ -199,7 +202,7 @@ static void pc_init1(MachineState *machine,
>
> pci_bus = i440fx_init(host_type,
> pci_type,
> - &i440fx_state,
> + i440fx_dev, &i440fx_state,
confusing names, suggest to rename i440fx_state -> pci_i440fx and i440fx_dev -> i440fx_host
or something like this
> system_memory, system_io, machine->ram_size,
> x86ms->below_4g_mem_size,
> x86ms->above_4g_mem_size,
> diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
> index 42eb8b97079a..8d867bdb274a 100644
> --- a/hw/i386/pc_q35.c
> +++ b/hw/i386/pc_q35.c
> @@ -203,12 +203,12 @@ static void pc_q35_init(MachineState *machine)
> pcms->smbios_entry_point_type);
> }
>
> - /* allocate ram and load rom/bios */
> - pc_memory_init(pcms, get_system_memory(), rom_memory, &ram_memory);
> -
> /* create pci host bus */
> q35_host = Q35_HOST_DEVICE(qdev_new(TYPE_Q35_HOST_DEVICE));
>
> + /* allocate ram and load rom/bios */
> + pc_memory_init(pcms, get_system_memory(), rom_memory, &ram_memory);
> +
> object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host));
> object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_RAM_MEM,
> OBJECT(ram_memory), NULL);
> diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c
> index e08716142b6e..5c1bab5c58ed 100644
> --- a/hw/pci-host/i440fx.c
> +++ b/hw/pci-host/i440fx.c
> @@ -238,6 +238,7 @@ static void i440fx_realize(PCIDevice *dev, Error **errp)
> }
>
> PCIBus *i440fx_init(const char *host_type, const char *pci_type,
does it still need 'host_type'?
> + DeviceState *dev,
> PCII440FXState **pi440fx_state,
> MemoryRegion *address_space_mem,
> MemoryRegion *address_space_io,
> @@ -247,7 +248,6 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type,
> MemoryRegion *pci_address_space,
> MemoryRegion *ram_memory)
> {
> - DeviceState *dev;
> PCIBus *b;
> PCIDevice *d;
> PCIHostState *s;
> @@ -255,7 +255,6 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type,
> unsigned i;
> I440FXState *i440fx;
>
> - dev = qdev_new(host_type);
> s = PCI_HOST_BRIDGE(dev);
> b = pci_root_bus_new(dev, NULL, pci_address_space,
> address_space_io, 0, TYPE_PCI_BUS);
> diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h
> index f068aaba8fda..c4710445e30a 100644
> --- a/include/hw/pci-host/i440fx.h
> +++ b/include/hw/pci-host/i440fx.h
> @@ -36,7 +36,7 @@ struct PCII440FXState {
> #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX"
>
> PCIBus *i440fx_init(const char *host_type, const char *pci_type,
> - PCII440FXState **pi440fx_state,
> + DeviceState *dev, PCII440FXState **pi440fx_state,
> MemoryRegion *address_space_mem,
> MemoryRegion *address_space_io,
> ram_addr_t ram_size,
next prev parent reply other threads:[~2022-06-16 13:51 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-20 10:45 [PATCH v5 0/5] i386/pc: Fix creation of >= 1010G guests on AMD systems with IOMMU Joao Martins
2022-05-20 10:45 ` [PATCH v5 1/5] hw/i386: add 4g boundary start to X86MachineState Joao Martins
2022-06-16 13:05 ` Igor Mammedov
2022-06-17 10:57 ` Joao Martins
2022-05-20 10:45 ` [PATCH v5 2/5] i386/pc: create pci-host qdev prior to pc_memory_init() Joao Martins
2022-06-16 13:21 ` Reviewed-by: Igor Mammedov [this message]
2022-06-17 11:03 ` Joao Martins
2022-06-20 7:12 ` Mark Cave-Ayland
2022-05-20 10:45 ` [PATCH v5 3/5] i386/pc: pass pci_hole64_size " Joao Martins
2022-06-16 13:30 ` Igor Mammedov
2022-06-16 14:16 ` Michael S. Tsirkin
2022-06-17 11:13 ` Joao Martins
2022-06-17 11:58 ` Igor Mammedov
2022-05-20 10:45 ` [PATCH v5 4/5] i386/pc: relocate 4g start to 1T where applicable Joao Martins
2022-06-16 14:23 ` Igor Mammedov
2022-06-17 12:18 ` Joao Martins
2022-06-17 12:32 ` Igor Mammedov
2022-06-17 13:33 ` Joao Martins
2022-06-20 14:27 ` Igor Mammedov
2022-06-20 16:36 ` Joao Martins
2022-06-20 18:13 ` Joao Martins
2022-06-28 12:38 ` Igor Mammedov
2022-06-28 15:27 ` Joao Martins
2022-06-17 16:12 ` Joao Martins
2022-05-20 10:45 ` [PATCH v5 5/5] i386/pc: restrict AMD only enforcing of valid IOVAs to new machine type Joao Martins
2022-06-16 14:27 ` Igor Mammedov
2022-06-17 13:36 ` Joao Martins
2022-06-08 10:37 ` [PATCH v5 0/5] i386/pc: Fix creation of >= 1010G guests on AMD systems with IOMMU Joao Martins
2022-06-22 22:37 ` Alex Williamson
2022-06-22 23:18 ` Joao Martins
2022-06-23 16:03 ` Alex Williamson
2022-06-23 17:13 ` Joao Martins
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