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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id x1-20020adff0c1000000b002103cfd2fbasm1879253wro.65.2022.06.16.06.21.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jun 2022 06:21:52 -0700 (PDT) Date: Thu, 16 Jun 2022 15:21:51 +0200 From: "Reviewed-by: Igor Mammedov" To: Joao Martins Cc: qemu-devel@nongnu.org, Eduardo Habkost , "Michael S. Tsirkin" , Richard Henderson , Daniel Jordan , David Edmondson , Alex Williamson , Paolo Bonzini , Ani Sinha , Marcel Apfelbaum , Suravee Suthikulpanit Subject: Re: [PATCH v5 2/5] i386/pc: create pci-host qdev prior to pc_memory_init() Message-ID: <20220616152151.42d6140a@redhat.com> In-Reply-To: <20220520104532.9816-3-joao.m.martins@oracle.com> References: <20220520104532.9816-1-joao.m.martins@oracle.com> <20220520104532.9816-3-joao.m.martins@oracle.com> X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Fri, 20 May 2022 11:45:29 +0100 Joao Martins wrote: > At the start of pc_memory_init() we usually pass a range of > 0..UINT64_MAX as pci_memory, when really its 2G (i440fx) or > 32G (q35). To get the real user value, we need to get pci-host > passed property for default pci_hole64_size. Thus to get that, > create the qdev prior to memory init to better make estimations > on max used/phys addr. > > This is in preparation to determine that host-phys-bits are > enough and also for pci-hole64-size to be considered to relocate > ram-above-4g to be at 1T (on AMD platforms). with comments below fixed Reviewed-by: Igor Mammedov > Signed-off-by: Joao Martins > --- > hw/i386/pc_piix.c | 5 ++++- > hw/i386/pc_q35.c | 6 +++--- > hw/pci-host/i440fx.c | 3 +-- > include/hw/pci-host/i440fx.h | 2 +- > 4 files changed, 9 insertions(+), 7 deletions(-) > > diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c > index 578e537b3525..12d4a279c793 100644 > --- a/hw/i386/pc_piix.c > +++ b/hw/i386/pc_piix.c > @@ -91,6 +91,7 @@ static void pc_init1(MachineState *machine, > MemoryRegion *pci_memory; > MemoryRegion *rom_memory; > ram_addr_t lowmem; > + DeviceState *i440fx_dev; > > /* > * Calculate ram split, for memory below and above 4G. It's a bit > @@ -164,9 +165,11 @@ static void pc_init1(MachineState *machine, > pci_memory = g_new(MemoryRegion, 1); > memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); > rom_memory = pci_memory; > + i440fx_dev = qdev_new(host_type); > } else { > pci_memory = NULL; > rom_memory = system_memory; > + i440fx_dev = NULL; > } > > pc_guest_info_init(pcms); > @@ -199,7 +202,7 @@ static void pc_init1(MachineState *machine, > > pci_bus = i440fx_init(host_type, > pci_type, > - &i440fx_state, > + i440fx_dev, &i440fx_state, confusing names, suggest to rename i440fx_state -> pci_i440fx and i440fx_dev -> i440fx_host or something like this > system_memory, system_io, machine->ram_size, > x86ms->below_4g_mem_size, > x86ms->above_4g_mem_size, > diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c > index 42eb8b97079a..8d867bdb274a 100644 > --- a/hw/i386/pc_q35.c > +++ b/hw/i386/pc_q35.c > @@ -203,12 +203,12 @@ static void pc_q35_init(MachineState *machine) > pcms->smbios_entry_point_type); > } > > - /* allocate ram and load rom/bios */ > - pc_memory_init(pcms, get_system_memory(), rom_memory, &ram_memory); > - > /* create pci host bus */ > q35_host = Q35_HOST_DEVICE(qdev_new(TYPE_Q35_HOST_DEVICE)); > > + /* allocate ram and load rom/bios */ > + pc_memory_init(pcms, get_system_memory(), rom_memory, &ram_memory); > + > object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host)); > object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_RAM_MEM, > OBJECT(ram_memory), NULL); > diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c > index e08716142b6e..5c1bab5c58ed 100644 > --- a/hw/pci-host/i440fx.c > +++ b/hw/pci-host/i440fx.c > @@ -238,6 +238,7 @@ static void i440fx_realize(PCIDevice *dev, Error **errp) > } > > PCIBus *i440fx_init(const char *host_type, const char *pci_type, does it still need 'host_type'? > + DeviceState *dev, > PCII440FXState **pi440fx_state, > MemoryRegion *address_space_mem, > MemoryRegion *address_space_io, > @@ -247,7 +248,6 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type, > MemoryRegion *pci_address_space, > MemoryRegion *ram_memory) > { > - DeviceState *dev; > PCIBus *b; > PCIDevice *d; > PCIHostState *s; > @@ -255,7 +255,6 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type, > unsigned i; > I440FXState *i440fx; > > - dev = qdev_new(host_type); > s = PCI_HOST_BRIDGE(dev); > b = pci_root_bus_new(dev, NULL, pci_address_space, > address_space_io, 0, TYPE_PCI_BUS); > diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h > index f068aaba8fda..c4710445e30a 100644 > --- a/include/hw/pci-host/i440fx.h > +++ b/include/hw/pci-host/i440fx.h > @@ -36,7 +36,7 @@ struct PCII440FXState { > #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" > > PCIBus *i440fx_init(const char *host_type, const char *pci_type, > - PCII440FXState **pi440fx_state, > + DeviceState *dev, PCII440FXState **pi440fx_state, > MemoryRegion *address_space_mem, > MemoryRegion *address_space_io, > ram_addr_t ram_size,