From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 0/9] tcg patch queue for 2022-06-21
Date: Tue, 21 Jun 2022 13:46:34 -0700 [thread overview]
Message-ID: <20220621204643.371397-1-richard.henderson@linaro.org> (raw)
The following changes since commit c8b2d413761af732a0798d8df45ce968732083fe:
Merge tag 'bsd-user-syscall-2022q2-pull-request' of ssh://github.com/qemu-bsd-user/qemu-bsd-user into staging (2022-06-19 13:56:13 -0700)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220621
for you to fetch changes up to c79a8e840c435bc26a251e34b043318e8b2081db:
util/cacheflush: Optimize flushing when ppc host has coherent icache (2022-06-21 09:28:41 -0700)
----------------------------------------------------------------
Speed empty timer list in qemu_clock_deadline_ns_all.
Implement remainder for Power3.1 hosts.
Optimize ppc host icache flushing.
Cleanups to tcg_accel_ops_init.
Fix mmio crash accessing unmapped physical memory.
----------------------------------------------------------------
Bin Meng (1):
target/avr: Drop avr_cpu_memory_rw_debug()
Idan Horowitz (1):
qemu-timer: Skip empty timer lists before locking in qemu_clock_deadline_ns_all
Matheus Kowalczuk Ferst (1):
tcg/ppc: implement rem[u]_i{32,64} with mod[su][wd]
Nicholas Piggin (1):
util/cacheflush: Optimize flushing when ppc host has coherent icache
Philippe Mathieu-Daudé (2):
accel/tcg: Init TCG cflags in vCPU thread handler
accel/tcg: Reorganize tcg_accel_ops_init()
Richard Henderson (3):
softmmu: Always initialize xlat in address_space_translate_for_iotlb
util: Merge cacheflush.c and cacheinfo.c
util/cacheflush: Merge aarch64 ctr_el0 usage
target/avr/cpu.h | 2 -
tcg/ppc/tcg-target.h | 4 +-
accel/tcg/tcg-accel-ops-mttcg.c | 5 +-
accel/tcg/tcg-accel-ops-rr.c | 7 +-
accel/tcg/tcg-accel-ops.c | 15 +--
softmmu/physmem.c | 13 ++-
target/avr/cpu.c | 1 -
target/avr/helper.c | 6 -
util/cacheflush.c | 247 +++++++++++++++++++++++++++++++++++++---
util/cacheinfo.c | 200 --------------------------------
util/qemu-timer.c | 3 +
tcg/ppc/tcg-target.c.inc | 22 ++++
util/meson.build | 2 +-
13 files changed, 284 insertions(+), 243 deletions(-)
delete mode 100644 util/cacheinfo.c
next reply other threads:[~2022-06-21 20:49 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-21 20:46 Richard Henderson [this message]
2022-06-21 20:46 ` [PULL 1/9] tcg/ppc: implement rem[u]_i{32,64} with mod[su][wd] Richard Henderson
2022-06-21 20:46 ` [PULL 2/9] target/avr: Drop avr_cpu_memory_rw_debug() Richard Henderson
2022-06-21 20:46 ` [PULL 3/9] accel/tcg: Init TCG cflags in vCPU thread handler Richard Henderson
2022-10-20 12:33 ` Peter Maydell
2022-06-21 20:46 ` [PULL 4/9] accel/tcg: Reorganize tcg_accel_ops_init() Richard Henderson
2022-06-21 20:46 ` [PULL 5/9] qemu-timer: Skip empty timer lists before locking in qemu_clock_deadline_ns_all Richard Henderson
2022-06-21 20:46 ` [PULL 6/9] softmmu: Always initialize xlat in address_space_translate_for_iotlb Richard Henderson
2022-06-21 20:46 ` [PULL 7/9] util: Merge cacheflush.c and cacheinfo.c Richard Henderson
2022-06-21 20:46 ` [PULL 8/9] util/cacheflush: Merge aarch64 ctr_el0 usage Richard Henderson
2022-06-21 20:46 ` [PULL 9/9] util/cacheflush: Optimize flushing when ppc host has coherent icache Richard Henderson
2022-06-21 23:33 ` [PULL 0/9] tcg patch queue for 2022-06-21 Richard Henderson
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