From: Peter Delevoryas <pdel@fb.com>
Cc: <pdel@fb.com>, <clg@kaod.org>, <peter.maydell@linaro.org>,
<qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>
Subject: [PATCH v2 2/8] aspeed: Add memory property to Aspeed SoC
Date: Thu, 23 Jun 2022 17:36:55 -0700 [thread overview]
Message-ID: <20220624003701.1363500-3-pdel@fb.com> (raw)
In-Reply-To: <20220624003701.1363500-1-pdel@fb.com>
Multi-SoC machines can use this property to specify a memory container
for each SoC. Single SoC machines will just specify get_system_memory().
Signed-off-by: Peter Delevoryas <pdel@fb.com>
---
hw/arm/aspeed.c | 4 ++++
hw/arm/aspeed_ast10x0.c | 5 ++---
hw/arm/aspeed_ast2600.c | 4 ++--
hw/arm/aspeed_soc.c | 14 ++++++++------
include/hw/arm/aspeed_soc.h | 1 +
5 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index dc09773b0b..b43dc0fda8 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -329,6 +329,8 @@ static void aspeed_machine_init(MachineState *machine)
&error_abort);
object_property_set_int(OBJECT(&bmc->soc), "hw-strap2", amc->hw_strap2,
&error_abort);
+ object_property_set_link(OBJECT(&bmc->soc), "memory",
+ OBJECT(get_system_memory()), &error_abort);
object_property_set_link(OBJECT(&bmc->soc), "dram",
OBJECT(machine->ram), &error_abort);
if (machine->kernel_filename) {
@@ -1336,6 +1338,8 @@ static void aspeed_minibmc_machine_init(MachineState *machine)
object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name);
qdev_connect_clock_in(DEVICE(&bmc->soc), "sysclk", sysclk);
+ object_property_set_link(OBJECT(&bmc->soc), "memory",
+ OBJECT(get_system_memory()), &error_abort);
qdev_prop_set_uint32(DEVICE(&bmc->soc), "uart-default",
amc->uart_default);
qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort);
diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c
index 5df480a21f..e074f80cc7 100644
--- a/hw/arm/aspeed_ast10x0.c
+++ b/hw/arm/aspeed_ast10x0.c
@@ -148,7 +148,6 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev_soc, Error **errp)
{
AspeedSoCState *s = ASPEED_SOC(dev_soc);
AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
- MemoryRegion *system_memory = get_system_memory();
DeviceState *armv7m;
Error *err = NULL;
int i;
@@ -172,7 +171,7 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev_soc, Error **errp)
qdev_prop_set_string(armv7m, "cpu-type", sc->cpu_type);
qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk);
object_property_set_link(OBJECT(&s->armv7m), "memory",
- OBJECT(system_memory), &error_abort);
+ OBJECT(s->memory), &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->armv7m), &error_abort);
/* Internal SRAM */
@@ -181,7 +180,7 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev_soc, Error **errp)
error_propagate(errp, err);
return;
}
- memory_region_add_subregion(system_memory,
+ memory_region_add_subregion(s->memory,
sc->memmap[ASPEED_DEV_SRAM],
&s->sram);
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index f950fff070..d8e5b607e9 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -295,7 +295,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
object_property_set_int(OBJECT(&s->cpu[i]), "cntfrq", 1125000000,
&error_abort);
object_property_set_link(OBJECT(&s->cpu[i]), "memory",
- OBJECT(get_system_memory()), &error_abort);
+ OBJECT(s->memory), &error_abort);
if (!qdev_realize(DEVICE(&s->cpu[i]), NULL, errp)) {
return;
@@ -333,7 +333,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
error_propagate(errp, err);
return;
}
- memory_region_add_subregion(get_system_memory(),
+ memory_region_add_subregion(s->memory,
sc->memmap[ASPEED_DEV_SRAM], &s->sram);
/* DPMCU */
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 06e5629800..3b531519e9 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -248,7 +248,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
/* CPU */
for (i = 0; i < sc->num_cpus; i++) {
object_property_set_link(OBJECT(&s->cpu[i]), "memory",
- OBJECT(get_system_memory()), &error_abort);
+ OBJECT(s->memory), &error_abort);
if (!qdev_realize(DEVICE(&s->cpu[i]), NULL, errp)) {
return;
}
@@ -261,7 +261,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
error_propagate(errp, err);
return;
}
- memory_region_add_subregion(get_system_memory(),
+ memory_region_add_subregion(s->memory,
sc->memmap[ASPEED_DEV_SRAM], &s->sram);
/* SCU */
@@ -456,6 +456,8 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
aspeed_soc_get_irq(s, ASPEED_DEV_HACE));
}
static Property aspeed_soc_properties[] = {
+ DEFINE_PROP_LINK("memory", AspeedSoCState, memory, TYPE_MEMORY_REGION,
+ MemoryRegion *),
DEFINE_PROP_LINK("dram", AspeedSoCState, dram_mr, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_UINT32("uart-default", AspeedSoCState, uart_default,
@@ -555,14 +557,14 @@ void aspeed_soc_uart_init(AspeedSoCState *s)
int i, uart;
/* Attach an 8250 to the IO space as our UART */
- serial_mm_init(get_system_memory(), sc->memmap[s->uart_default], 2,
+ serial_mm_init(s->memory, sc->memmap[s->uart_default], 2,
aspeed_soc_get_irq(s, s->uart_default), 38400,
serial_hd(0), DEVICE_LITTLE_ENDIAN);
for (i = 1, uart = ASPEED_DEV_UART1; i < sc->uarts_num; i++, uart++) {
if (uart == s->uart_default) {
uart++;
}
- serial_mm_init(get_system_memory(), sc->memmap[uart], 2,
+ serial_mm_init(s->memory, sc->memmap[uart], 2,
aspeed_soc_get_irq(s, uart), 38400,
serial_hd(i), DEVICE_LITTLE_ENDIAN);
}
@@ -596,7 +598,7 @@ bool aspeed_soc_dram_init(AspeedSoCState *s, Error **errp)
memory_region_add_subregion_overlap(&s->dram_container, ram_size,
sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0), -1000);
- memory_region_add_subregion(get_system_memory(),
- sc->memmap[ASPEED_DEV_SDRAM], &s->dram_container);
+ memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SDRAM],
+ &s->dram_container);
return true;
}
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index e8a104823d..c8e903b821 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -49,6 +49,7 @@ struct AspeedSoCState {
ARMCPU cpu[ASPEED_CPUS_NUM];
A15MPPrivState a7mpcore;
ARMv7MState armv7m;
+ MemoryRegion *memory;
MemoryRegion *dram_mr;
MemoryRegion dram_container;
MemoryRegion sram;
--
2.30.2
next prev parent reply other threads:[~2022-06-24 0:44 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-24 0:36 [PATCH v2 0/8] aspeed: Add multi-SoC machine Peter Delevoryas
2022-06-24 0:36 ` [PATCH v2 1/8] aspeed: Set CPU memory property explicitly Peter Delevoryas
2022-06-24 6:36 ` Cédric Le Goater
2022-06-24 6:55 ` Cédric Le Goater
2022-06-24 14:00 ` Peter Delevoryas
2022-06-24 0:36 ` Peter Delevoryas [this message]
2022-06-24 6:40 ` [PATCH v2 2/8] aspeed: Add memory property to Aspeed SoC Cédric Le Goater
2022-06-24 0:36 ` [PATCH v2 3/8] aspeed: Remove usage of sysbus_mmio_map Peter Delevoryas
2022-06-24 6:56 ` Cédric Le Goater
2022-06-24 0:36 ` [PATCH v2 4/8] aspeed: Map unimplemented devices in SoC memory Peter Delevoryas
2022-06-24 6:58 ` Cédric Le Goater
2022-06-24 0:36 ` [PATCH v2 5/8] aspeed: Remove use of qemu_get_cpu Peter Delevoryas
2022-06-24 6:58 ` Cédric Le Goater
2022-06-24 0:36 ` [PATCH v2 6/8] aspeed: Add fby35 skeleton Peter Delevoryas
2022-06-24 7:00 ` Cédric Le Goater
2022-06-24 0:37 ` [PATCH v2 7/8] aspeed: Make aspeed_board_init_flashes public Peter Delevoryas
2022-06-28 5:03 ` Cédric Le Goater
2022-06-24 0:37 ` [PATCH v2 8/8] aspeed: Add AST2600 (BMC) to fby35 Peter Delevoryas
2022-06-28 5:01 ` Cédric Le Goater
2022-06-28 6:55 ` Peter Delevoryas
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