From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: <qemu-devel@nongnu.org>, <alex.bennee@linaro.org>,
<qemu-arm@nongnu.org>, "Michael S . Tsirkin" <mst@redhat.com>,
Ben Widawsky <bwidawsk@kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>, <linux-cxl@vger.kernel.org>,
<linuxarm@huawei.com>, Marcel Apfelbaum <marcel@redhat.com>,
Igor Mammedov <imammedo@redhat.com>,
Markus Armbruster <armbru@redhat.com>,
"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
Adam Manzanares <a.manzanares@samsung.com>,
Tong Zhang <ztong0001@gmail.com>,
"Shameerali Kolothum Thodi"
<shameerali.kolothum.thodi@huawei.com>,
Dan Williams <dan.j.williams@intel.com>
Subject: Re: [PATCH v11 1/2] hw/arm/virt: Basic CXL enablement on pci_expander_bridge instances pxb-cxl
Date: Fri, 24 Jun 2022 16:59:32 +0100 [thread overview]
Message-ID: <20220624165932.00007ec0@Huawei.com> (raw)
In-Reply-To: <CAFEAcA8MLTm9XwAV_JU_EPiT9wfaZed8B19-pL=HobKepJsnkg@mail.gmail.com>
On Fri, 24 Jun 2022 16:01:42 +0100
Peter Maydell <peter.maydell@linaro.org> wrote:
> On Fri, 24 Jun 2022 at 15:54, Jonathan Cameron
> <Jonathan.Cameron@huawei.com> wrote:
> > Just occurred to me there is another barrier to an approach that adds
> > DT bindings.
> > I fairly sure hw/pci-bridge/pci_expander_bridge.c (PXB)
> > only works on ACPI platforms and is the only host bridge supported
> > for CXL emulation in QEMU.
>
> Isn't it probeable like any other PCI device/bridge ?
Nope - PXB is a really weird device. (I tested it quickly in case I was
wrong and indeed, no sign of device on the downstream side without a
suitable BIOS / ACPI)
There is no driver support for it as such, rather it presents
as two things.
1) A EP on the main host bridge - which is used for interrupt routing
and possibly a few other things. Linux has no idea that's what it
is though so attaches no driver to it. lspci shows this as
Red Hat, Inc, QEMU PCIe Expander Bridge
2) A host bridge with firmware described characteristics (bus number
range and similar). Host bridges as defined in ACPI are a concept
rather than actual hardware and presented to the OS via firmware
descriptions (ACPI DSDT stuff in this case).
You could probably add dt description via
pci-host-ecam-generic bindings though but it would be an interesting
late bit of dt addition in the virt_machine_done() function. Similar
to the fw_cfg and ACPI stuff done at that stage to deal with PXB
devices becoming visible.
So gut feeling is PXB could be made to work with DT, but doesn't today.
Give the main usecase for PXB is typically NUMA description I guess no one
noticed on DT platforms.
Jonathan
>
> -- PMM
next prev parent reply other threads:[~2022-06-24 16:06 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-16 14:19 [PATCH v11 0/2] arm/virt: CXL support via pxb_cxl Jonathan Cameron via
2022-06-16 14:19 ` [PATCH v11 1/2] hw/arm/virt: Basic CXL enablement on pci_expander_bridge instances pxb-cxl Jonathan Cameron via
2022-06-24 10:48 ` Peter Maydell
2022-06-24 12:39 ` Jonathan Cameron via
2022-06-24 12:56 ` Peter Maydell
2022-06-24 14:08 ` Jonathan Cameron via
2022-06-24 14:54 ` Jonathan Cameron via
2022-06-24 15:01 ` Peter Maydell
2022-06-24 15:59 ` Jonathan Cameron via [this message]
2022-06-16 14:19 ` [PATCH v11 2/2] qtest/cxl: Add aarch64 virt test for CXL Jonathan Cameron via
2022-06-24 10:41 ` Peter Maydell
2022-06-24 16:12 ` Peter Maydell
2022-06-24 17:59 ` Jonathan Cameron via
2022-06-24 9:07 ` [PATCH v11 0/2] arm/virt: CXL support via pxb_cxl Jonathan Cameron via
-- strict thread matches above, loose matches on Subject: below --
2022-05-20 16:37 [PATCH v11 0/2] hw/arm/virt: CXL 2.0 emulation support Jonathan Cameron via
2022-05-20 16:37 ` [PATCH v11 1/2] hw/arm/virt: Basic CXL enablement on pci_expander_bridge instances pxb-cxl Jonathan Cameron via
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