From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: <qemu-devel@nongnu.org>, <alex.bennee@linaro.org>,
<qemu-arm@nongnu.org>, "Michael S . Tsirkin" <mst@redhat.com>,
Ben Widawsky <bwidawsk@kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>, <linux-cxl@vger.kernel.org>,
<linuxarm@huawei.com>, Marcel Apfelbaum <marcel@redhat.com>,
Igor Mammedov <imammedo@redhat.com>,
Markus Armbruster <armbru@redhat.com>,
"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
Adam Manzanares <a.manzanares@samsung.com>,
Tong Zhang <ztong0001@gmail.com>,
"Shameerali Kolothum Thodi"
<shameerali.kolothum.thodi@huawei.com>
Subject: Re: [PATCH v11 2/2] qtest/cxl: Add aarch64 virt test for CXL
Date: Fri, 24 Jun 2022 18:59:22 +0100 [thread overview]
Message-ID: <20220624185922.0000458f@Huawei.com> (raw)
In-Reply-To: <CAFEAcA_tck3fG67qO=4QiTHY2ST3jvy7-w156XkMKMv38-aN9g@mail.gmail.com>
On Fri, 24 Jun 2022 17:12:25 +0100
Peter Maydell <peter.maydell@linaro.org> wrote:
> On Thu, 16 Jun 2022 at 15:20, Jonathan Cameron
> <Jonathan.Cameron@huawei.com> wrote:
> >
> > Add a single complex case for aarch64 virt machine.
> >
> > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > ---
> > tests/qtest/cxl-test.c | 48 +++++++++++++++++++++++++++++++++--------
> > tests/qtest/meson.build | 1 +
> > 2 files changed, 40 insertions(+), 9 deletions(-)
> >
> > diff --git a/tests/qtest/cxl-test.c b/tests/qtest/cxl-test.c
> > index 2133e973f4..1015d0e7c2 100644
> > --- a/tests/qtest/cxl-test.c
> > +++ b/tests/qtest/cxl-test.c
> > @@ -17,6 +17,11 @@
> > "-device pxb-cxl,id=cxl.1,bus=pcie.0,bus_nr=53 " \
> > "-M cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.targets.1=cxl.1,cxl-fmw.0.size=4G "
> >
> > +#define QEMU_VIRT_2PXB_CMD "-machine virt,cxl=on " \
> > + "-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 " \
> > + "-device pxb-cxl,id=cxl.1,bus=pcie.0,bus_nr=53 " \
> > + "-M cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.targets.1=cxl.1,cxl-fmw.0.size=4G "
> > +
>
> If CXL requires booting via UEFI, what does this test case do?
> It doesn't seem to be passing in a BIOS image.
Not a lot beyond checking device creation is valid etc and the machine boots.
There is a bios tables test that checks we pass the right tables to the BIOS image.
I didn't duplicate that for ARM on the basis it's more or less identical, but
perhaps that is worth adding.
To do any useful functional testing will require a mass of complex OS
handling after booting. That testing is definitely something I'd like to
add, but the userspace tooling isn't all in place yet. Final kernel series that's
needed to get to the point where you can use the non volatile memory had
a new version posted yesterday.
Jonathan
>
> thanks
> -- PMM
next prev parent reply other threads:[~2022-06-24 18:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-16 14:19 [PATCH v11 0/2] arm/virt: CXL support via pxb_cxl Jonathan Cameron via
2022-06-16 14:19 ` [PATCH v11 1/2] hw/arm/virt: Basic CXL enablement on pci_expander_bridge instances pxb-cxl Jonathan Cameron via
2022-06-24 10:48 ` Peter Maydell
2022-06-24 12:39 ` Jonathan Cameron via
2022-06-24 12:56 ` Peter Maydell
2022-06-24 14:08 ` Jonathan Cameron via
2022-06-24 14:54 ` Jonathan Cameron via
2022-06-24 15:01 ` Peter Maydell
2022-06-24 15:59 ` Jonathan Cameron via
2022-06-16 14:19 ` [PATCH v11 2/2] qtest/cxl: Add aarch64 virt test for CXL Jonathan Cameron via
2022-06-24 10:41 ` Peter Maydell
2022-06-24 16:12 ` Peter Maydell
2022-06-24 17:59 ` Jonathan Cameron via [this message]
2022-06-24 9:07 ` [PATCH v11 0/2] arm/virt: CXL support via pxb_cxl Jonathan Cameron via
-- strict thread matches above, loose matches on Subject: below --
2022-05-20 16:37 [PATCH v11 0/2] hw/arm/virt: CXL 2.0 emulation support Jonathan Cameron via
2022-05-20 16:37 ` [PATCH v11 2/2] qtest/cxl: Add aarch64 virt test for CXL Jonathan Cameron via
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