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From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com,
	peter.maydell@linaro.org, richard.henderson@linaro.org,
	"Matheus Ferst" <matheus.ferst@eldorado.org.br>,
	"Víctor Colombo" <victor.colombo@eldorado.org.br>
Subject: [PULL 12/34] target/ppc: use int128.h methods in vpmsumd
Date: Wed,  6 Jul 2022 17:09:24 -0300	[thread overview]
Message-ID: <20220706200946.471114-13-danielhb413@gmail.com> (raw)
In-Reply-To: <20220706200946.471114-1-danielhb413@gmail.com>

From: Matheus Ferst <matheus.ferst@eldorado.org.br>

Also drop VECTOR_FOR_INORDER_I usage since there is no need to access
the elements in any particular order, and move the instruction to
decodetree.

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Message-Id: <20220606150037.338931-2-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
 target/ppc/helper.h                 |  2 +-
 target/ppc/insn32.decode            |  4 +++
 target/ppc/int_helper.c             | 48 ++++++-----------------------
 target/ppc/translate/vmx-impl.c.inc |  3 +-
 target/ppc/translate/vmx-ops.c.inc  |  1 -
 5 files changed, 17 insertions(+), 41 deletions(-)

diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index d627cfe6ed..39ad114c97 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -318,7 +318,7 @@ DEF_HELPER_FLAGS_3(vbpermq, TCG_CALL_NO_RWG, void, avr, avr, avr)
 DEF_HELPER_FLAGS_3(vpmsumb, TCG_CALL_NO_RWG, void, avr, avr, avr)
 DEF_HELPER_FLAGS_3(vpmsumh, TCG_CALL_NO_RWG, void, avr, avr, avr)
 DEF_HELPER_FLAGS_3(vpmsumw, TCG_CALL_NO_RWG, void, avr, avr, avr)
-DEF_HELPER_FLAGS_3(vpmsumd, TCG_CALL_NO_RWG, void, avr, avr, avr)
+DEF_HELPER_FLAGS_3(VPMSUMD, TCG_CALL_NO_RWG, void, avr, avr, avr)
 DEF_HELPER_FLAGS_2(vextublx, TCG_CALL_NO_RWG, tl, tl, avr)
 DEF_HELPER_FLAGS_2(vextuhlx, TCG_CALL_NO_RWG, tl, tl, avr)
 DEF_HELPER_FLAGS_2(vextuwlx, TCG_CALL_NO_RWG, tl, tl, avr)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 6ea48d5163..0772729c6e 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -426,6 +426,10 @@ DSCLIQ          111111 ..... ..... ...... 001000010 .   @Z22_tap_sh_rc
 DSCRI           111011 ..... ..... ...... 001100010 .   @Z22_ta_sh_rc
 DSCRIQ          111111 ..... ..... ...... 001100010 .   @Z22_tap_sh_rc
 
+## Vector Exclusive-OR-based Instructions
+
+VPMSUMD         000100 ..... ..... ..... 10011001000    @VX
+
 ## Vector Integer Instructions
 
 VCMPEQUB        000100 ..... ..... ..... . 0000000110   @VC
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 3ae03f73d3..1476e51651 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -1484,52 +1484,24 @@ PMSUM(vpmsumb, u8, u16, uint16_t)
 PMSUM(vpmsumh, u16, u32, uint32_t)
 PMSUM(vpmsumw, u32, u64, uint64_t)
 
-void helper_vpmsumd(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
+void helper_VPMSUMD(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
 {
-
-#ifdef CONFIG_INT128
     int i, j;
-    __uint128_t prod[2];
-
-    VECTOR_FOR_INORDER_I(i, u64) {
-        prod[i] = 0;
-        for (j = 0; j < 64; j++) {
-            if (a->u64[i] & (1ull << j)) {
-                prod[i] ^= (((__uint128_t)b->u64[i]) << j);
+    Int128 tmp, prod[2] = {int128_zero(), int128_zero()};
+
+    for (j = 0; j < 64; j++) {
+        for (i = 0; i < ARRAY_SIZE(r->u64); i++) {
+            if (a->VsrD(i) & (1ull << j)) {
+                tmp = int128_make64(b->VsrD(i));
+                tmp = int128_lshift(tmp, j);
+                prod[i] = int128_xor(prod[i], tmp);
             }
         }
     }
 
-    r->u128 = prod[0] ^ prod[1];
-
-#else
-    int i, j;
-    ppc_avr_t prod[2];
-
-    VECTOR_FOR_INORDER_I(i, u64) {
-        prod[i].VsrD(1) = prod[i].VsrD(0) = 0;
-        for (j = 0; j < 64; j++) {
-            if (a->u64[i] & (1ull << j)) {
-                ppc_avr_t bshift;
-                if (j == 0) {
-                    bshift.VsrD(0) = 0;
-                    bshift.VsrD(1) = b->u64[i];
-                } else {
-                    bshift.VsrD(0) = b->u64[i] >> (64 - j);
-                    bshift.VsrD(1) = b->u64[i] << j;
-                }
-                prod[i].VsrD(1) ^= bshift.VsrD(1);
-                prod[i].VsrD(0) ^= bshift.VsrD(0);
-            }
-        }
-    }
-
-    r->VsrD(1) = prod[0].VsrD(1) ^ prod[1].VsrD(1);
-    r->VsrD(0) = prod[0].VsrD(0) ^ prod[1].VsrD(0);
-#endif
+    r->s128 = int128_xor(prod[0], prod[1]);
 }
 
-
 #if HOST_BIG_ENDIAN
 #define PKBIG 1
 #else
diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc
index 0b563bed37..4c2a36405b 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -2717,7 +2717,6 @@ GEN_VXFORM_TRANS(vgbbd, 6, 20);
 GEN_VXFORM(vpmsumb, 4, 16)
 GEN_VXFORM(vpmsumh, 4, 17)
 GEN_VXFORM(vpmsumw, 4, 18)
-GEN_VXFORM(vpmsumd, 4, 19)
 
 #define GEN_BCD(op)                                 \
 static void gen_##op(DisasContext *ctx)             \
@@ -3101,6 +3100,8 @@ static bool do_vx_helper(DisasContext *ctx, arg_VX *a,
     return true;
 }
 
+TRANS_FLAGS2(ALTIVEC_207, VPMSUMD, do_vx_helper, gen_helper_VPMSUMD)
+
 static bool do_vx_vmuleo(DisasContext *ctx, arg_VX *a, bool even,
                          void (*gen_mul)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64))
 {
diff --git a/target/ppc/translate/vmx-ops.c.inc b/target/ppc/translate/vmx-ops.c.inc
index d7cc57868e..26c1d957ee 100644
--- a/target/ppc/translate/vmx-ops.c.inc
+++ b/target/ppc/translate/vmx-ops.c.inc
@@ -237,7 +237,6 @@ GEN_VXFORM_207(vgbbd, 6, 20),
 GEN_VXFORM_207(vpmsumb, 4, 16),
 GEN_VXFORM_207(vpmsumh, 4, 17),
 GEN_VXFORM_207(vpmsumw, 4, 18),
-GEN_VXFORM_207(vpmsumd, 4, 19),
 
 GEN_VXFORM_207(vsbox, 4, 23),
 
-- 
2.36.1



  parent reply	other threads:[~2022-07-06 21:08 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-06 20:09 [PULL 00/34] ppc queue Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 01/34] ppc/pnv: move root port attach to pnv_phb4_realize() Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 02/34] ppc/pnv: attach phb3/phb4 root ports in QOM tree Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 03/34] ppc/pnv: assign pnv-phb-root-port chassis/slot earlier Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 04/34] ppc/pnv: make pnv_ics_get() use the chip8->phbs[] array Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 05/34] ppc/pnv: make pnv_ics_resend() use chip8->phbs[] Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 06/34] ppc/pnv: make pnv_chip_power8_pic_print_info() " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 07/34] ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb3 root bus Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 08/34] ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb4 " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 09/34] target/ppc: Change FPSCR_* to follow POWER ISA numbering convention Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 10/34] spapr/ddw: Reset DMA when the last non-default window is removed Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 11/34] spapr/ddw: Implement 64bit query extension Daniel Henrique Barboza
2022-07-06 20:09 ` Daniel Henrique Barboza [this message]
2022-07-06 20:09 ` [PULL 13/34] target/ppc: use int128.h methods in vadduqm Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 14/34] target/ppc: use int128.h methods in vaddecuq and vaddeuqm Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 15/34] target/ppc: use int128.h methods in vaddcuq Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 16/34] target/ppc: use int128.h methods in vsubuqm Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 17/34] target/ppc: use int128.h methods in vsubecuq and vsubeuqm Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 18/34] target/ppc: use int128.h methods in vsubcuq Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 19/34] ppc: Define SETFIELD for the ppc target Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 20/34] ppc/spapr: Implement H_WATCHDOG Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 21/34] target/ppc: Fix insn32.decode style issues Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 22/34] target/ppc: Move mffscrn[i] to decodetree Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 23/34] target/ppc: Move mffsce " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 24/34] target/ppc: Move mffsl " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 25/34] target/ppc: Move mffs[.] " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 26/34] target/ppc: Implement mffscdrn[i] instructions Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 27/34] tests/tcg/ppc64: Add mffsce test Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 28/34] target/ppc: Add flag for ISA v2.06 BCDA instructions Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 29/34] target/ppc: implement addg6s Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 30/34] target/ppc: implement cbcdtd Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 31/34] target/ppc: implement cdtbcd Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 32/34] target/ppc: Return default CPU for max CPU Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 33/34] target/ppc/cpu-models: Remove the "default" CPU alias Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 34/34] target/ppc: Fix MPC8555 and MPC8560 core type to e500v1 Daniel Henrique Barboza
2022-07-07  2:24 ` [PULL 00/34] ppc queue Richard Henderson

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