From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com,
peter.maydell@linaro.org, richard.henderson@linaro.org,
"Víctor Colombo" <victor.colombo@eldorado.org.br>
Subject: [PULL 21/34] target/ppc: Fix insn32.decode style issues
Date: Wed, 6 Jul 2022 17:09:33 -0300 [thread overview]
Message-ID: <20220706200946.471114-22-danielhb413@gmail.com> (raw)
In-Reply-To: <20220706200946.471114-1-danielhb413@gmail.com>
From: Víctor Colombo <victor.colombo@eldorado.org.br>
Some lines in insn32.decode have inconsistent alignment when compared
to others.
Fix this by changing the alignment of some lines, making it more
consistent throughout the file.
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220629162904.105060-2-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
target/ppc/insn32.decode | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 65a6a42f78..1a425ab28f 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -21,11 +21,11 @@
@A ...... frt:5 fra:5 frb:5 frc:5 ..... rc:1 &A
&D rt ra si:int64_t
-@D ...... rt:5 ra:5 si:s16 &D
+@D ...... rt:5 ra:5 si:s16 &D
&D_bf bf l:bool ra imm
-@D_bfs ...... bf:3 - l:1 ra:5 imm:s16 &D_bf
-@D_bfu ...... bf:3 - l:1 ra:5 imm:16 &D_bf
+@D_bfs ...... bf:3 . l:1 ra:5 imm:s16 &D_bf
+@D_bfu ...... bf:3 . l:1 ra:5 imm:16 &D_bf
%dq_si 4:s12 !function=times_16
%dq_rtp 22:4 !function=times_2
@@ -38,7 +38,7 @@
@DQ_TSXP ...... ..... ra:5 ............ .... &D si=%dq_si rt=%rt_tsxp
%ds_si 2:s14 !function=times_4
-@DS ...... rt:5 ra:5 .............. .. &D si=%ds_si
+@DS ...... rt:5 ra:5 .............. .. &D si=%ds_si
%ds_rtp 22:4 !function=times_2
@DS_rtp ...... ....0 ra:5 .............. .. &D rt=%ds_rtp si=%ds_si
@@ -49,10 +49,10 @@
&DX rt d
%dx_d 6:s10 16:5 0:1
-@DX ...... rt:5 ..... .......... ..... . &DX d=%dx_d
+@DX ...... rt:5 ..... .......... ..... . &DX d=%dx_d
&VA vrt vra vrb rc
-@VA ...... vrt:5 vra:5 vrb:5 rc:5 ...... &VA
+@VA ...... vrt:5 vra:5 vrb:5 rc:5 ...... &VA
&VC vrt vra vrb rc:bool
@VC ...... vrt:5 vra:5 vrb:5 rc:1 .......... &VC
@@ -61,7 +61,7 @@
@VN ...... vrt:5 vra:5 vrb:5 .. sh:3 ...... &VN
&VX vrt vra vrb
-@VX ...... vrt:5 vra:5 vrb:5 .......... . &VX
+@VX ...... vrt:5 vra:5 vrb:5 .......... . &VX
&VX_bf bf vra vrb
@VX_bf ...... bf:3 .. vra:5 vrb:5 ........... &VX_bf
@@ -76,13 +76,13 @@
@VX_tb_rc ...... vrt:5 ..... vrb:5 rc:1 .......... &VX_tb_rc
&VX_uim4 vrt uim vrb
-@VX_uim4 ...... vrt:5 . uim:4 vrb:5 ........... &VX_uim4
+@VX_uim4 ...... vrt:5 . uim:4 vrb:5 ........... &VX_uim4
&VX_tb vrt vrb
-@VX_tb ...... vrt:5 ..... vrb:5 ........... &VX_tb
+@VX_tb ...... vrt:5 ..... vrb:5 ........... &VX_tb
&X rt ra rb
-@X ...... rt:5 ra:5 rb:5 .......... . &X
+@X ...... rt:5 ra:5 rb:5 .......... . &X
&X_rc rt ra rb rc:bool
@X_rc ...... rt:5 ra:5 rb:5 .......... rc:1 &X_rc
@@ -107,7 +107,7 @@
@X_t_bp_rc ...... rt:5 ..... ....0 .......... rc:1 &X_tb_rc rb=%x_frbp
&X_bi rt bi
-@X_bi ...... rt:5 bi:5 ----- .......... - &X_bi
+@X_bi ...... rt:5 bi:5 ..... .......... . &X_bi
&X_bf bf ra rb
@X_bf ...... bf:3 .. ra:5 rb:5 .......... . &X_bf
@@ -122,7 +122,7 @@
@X_bf_uim_bp ...... bf:3 . uim:6 ....0 .......... . &X_bf_uim rb=%x_frbp
&X_bfl bf l:bool ra rb
-@X_bfl ...... bf:3 - l:1 ra:5 rb:5 ..........- &X_bfl
+@X_bfl ...... bf:3 . l:1 ra:5 rb:5 .......... . &X_bfl
%x_xt 0:1 21:5
&X_imm5 xt imm:uint8_t vrb
--
2.36.1
next prev parent reply other threads:[~2022-07-06 20:47 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-06 20:09 [PULL 00/34] ppc queue Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 01/34] ppc/pnv: move root port attach to pnv_phb4_realize() Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 02/34] ppc/pnv: attach phb3/phb4 root ports in QOM tree Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 03/34] ppc/pnv: assign pnv-phb-root-port chassis/slot earlier Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 04/34] ppc/pnv: make pnv_ics_get() use the chip8->phbs[] array Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 05/34] ppc/pnv: make pnv_ics_resend() use chip8->phbs[] Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 06/34] ppc/pnv: make pnv_chip_power8_pic_print_info() " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 07/34] ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb3 root bus Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 08/34] ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb4 " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 09/34] target/ppc: Change FPSCR_* to follow POWER ISA numbering convention Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 10/34] spapr/ddw: Reset DMA when the last non-default window is removed Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 11/34] spapr/ddw: Implement 64bit query extension Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 12/34] target/ppc: use int128.h methods in vpmsumd Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 13/34] target/ppc: use int128.h methods in vadduqm Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 14/34] target/ppc: use int128.h methods in vaddecuq and vaddeuqm Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 15/34] target/ppc: use int128.h methods in vaddcuq Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 16/34] target/ppc: use int128.h methods in vsubuqm Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 17/34] target/ppc: use int128.h methods in vsubecuq and vsubeuqm Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 18/34] target/ppc: use int128.h methods in vsubcuq Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 19/34] ppc: Define SETFIELD for the ppc target Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 20/34] ppc/spapr: Implement H_WATCHDOG Daniel Henrique Barboza
2022-07-06 20:09 ` Daniel Henrique Barboza [this message]
2022-07-06 20:09 ` [PULL 22/34] target/ppc: Move mffscrn[i] to decodetree Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 23/34] target/ppc: Move mffsce " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 24/34] target/ppc: Move mffsl " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 25/34] target/ppc: Move mffs[.] " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 26/34] target/ppc: Implement mffscdrn[i] instructions Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 27/34] tests/tcg/ppc64: Add mffsce test Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 28/34] target/ppc: Add flag for ISA v2.06 BCDA instructions Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 29/34] target/ppc: implement addg6s Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 30/34] target/ppc: implement cbcdtd Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 31/34] target/ppc: implement cdtbcd Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 32/34] target/ppc: Return default CPU for max CPU Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 33/34] target/ppc/cpu-models: Remove the "default" CPU alias Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 34/34] target/ppc: Fix MPC8555 and MPC8560 core type to e500v1 Daniel Henrique Barboza
2022-07-07 2:24 ` [PULL 00/34] ppc queue Richard Henderson
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