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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id b17-20020a1709063cb100b0072b1c21ce65sm59669ejh.150.2022.07.07.05.57.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Jul 2022 05:57:56 -0700 (PDT) Date: Thu, 7 Jul 2022 14:57:55 +0200 From: Igor Mammedov To: Joao Martins Cc: qemu-devel@nongnu.org, Eduardo Habkost , "Michael S. Tsirkin" , Richard Henderson , Alex Williamson , Paolo Bonzini , Ani Sinha , Marcel Apfelbaum , "Dr. David Alan Gilbert" , Suravee Suthikulpanit , Jonathan Cameron Subject: Re: [PATCH v6 05/10] i386/pc: factor out cxl range end to helper Message-ID: <20220707145755.280abc54@redhat.com> In-Reply-To: <20220701161014.3850-6-joao.m.martins@oracle.com> References: <20220701161014.3850-1-joao.m.martins@oracle.com> <20220701161014.3850-6-joao.m.martins@oracle.com> X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Fri, 1 Jul 2022 17:10:09 +0100 Joao Martins wrote: > Move calculation of CXL memory region end to separate helper in > preparation to allow pc_pci_hole64_start() to be called before > any mrs are initialized. s/mrs/memory regions/ > > Cc: Jonathan Cameron > Signed-off-by: Joao Martins > --- > hw/i386/pc.c | 31 +++++++++++++++++++++---------- > 1 file changed, 21 insertions(+), 10 deletions(-) > > diff --git a/hw/i386/pc.c b/hw/i386/pc.c > index 6c7c49ca5a32..0abbf81841a9 100644 > --- a/hw/i386/pc.c > +++ b/hw/i386/pc.c > @@ -825,6 +825,25 @@ static hwaddr pc_above_4g_end(PCMachineState *pcms) > return x86ms->above_4g_mem_start + x86ms->above_4g_mem_size; > } > > +static uint64_t pc_get_cxl_range_end(PCMachineState *pcms) > +{ > + uint64_t start = 0; > + > + if (pcms->cxl_devices_state.host_mr.addr) { > + start = pcms->cxl_devices_state.host_mr.addr + > + memory_region_size(&pcms->cxl_devices_state.host_mr); > + if (pcms->cxl_devices_state.fixed_windows) { > + GList *it; > + for (it = pcms->cxl_devices_state.fixed_windows; it; it = it->next) { > + CXLFixedWindow *fw = it->data; > + start = fw->mr.addr + memory_region_size(&fw->mr); > + } this block deals with 'initialized' memory regions, so claim 'before any mrs are initialized' in commit message is confusing at least or outright wrong. > + } > + } > + > + return start; > +} > + > void pc_memory_init(PCMachineState *pcms, > MemoryRegion *system_memory, > MemoryRegion *rom_memory, > @@ -1022,16 +1041,8 @@ uint64_t pc_pci_hole64_start(void) > MachineState *ms = MACHINE(pcms); > uint64_t hole64_start = 0; > > - if (pcms->cxl_devices_state.host_mr.addr) { > - hole64_start = pcms->cxl_devices_state.host_mr.addr + > - memory_region_size(&pcms->cxl_devices_state.host_mr); > - if (pcms->cxl_devices_state.fixed_windows) { > - GList *it; > - for (it = pcms->cxl_devices_state.fixed_windows; it; it = it->next) { > - CXLFixedWindow *fw = it->data; > - hole64_start = fw->mr.addr + memory_region_size(&fw->mr); > - } > - } > + if (pcms->cxl_devices_state.is_enabled) { > + hole64_start = pc_get_cxl_range_end(pcms); > } else if (pcmc->has_reserved_memory && ms->device_memory->base) { > hole64_start = ms->device_memory->base; > if (!pcmc->broken_reserved_end) {