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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH v6 42/45] linux-user/aarch64: Implement PR_SME_GET_VL, PR_SME_SET_VL
Date: Fri,  8 Jul 2022 20:45:37 +0530	[thread overview]
Message-ID: <20220708151540.18136-43-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220708151540.18136-1-richard.henderson@linaro.org>

These prctl set the Streaming SVE vector length, which may
be completely different from the Normal SVE vector length.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 linux-user/aarch64/target_prctl.h | 54 +++++++++++++++++++++++++++++++
 linux-user/syscall.c              | 16 +++++++++
 2 files changed, 70 insertions(+)

diff --git a/linux-user/aarch64/target_prctl.h b/linux-user/aarch64/target_prctl.h
index 40481e6663..907c314146 100644
--- a/linux-user/aarch64/target_prctl.h
+++ b/linux-user/aarch64/target_prctl.h
@@ -10,6 +10,7 @@ static abi_long do_prctl_sve_get_vl(CPUArchState *env)
 {
     ARMCPU *cpu = env_archcpu(env);
     if (cpu_isar_feature(aa64_sve, cpu)) {
+        /* PSTATE.SM is always unset on syscall entry. */
         return sve_vq(env) * 16;
     }
     return -TARGET_EINVAL;
@@ -27,6 +28,7 @@ static abi_long do_prctl_sve_set_vl(CPUArchState *env, abi_long arg2)
         && arg2 >= 0 && arg2 <= 512 * 16 && !(arg2 & 15)) {
         uint32_t vq, old_vq;
 
+        /* PSTATE.SM is always unset on syscall entry. */
         old_vq = sve_vq(env);
 
         /*
@@ -49,6 +51,58 @@ static abi_long do_prctl_sve_set_vl(CPUArchState *env, abi_long arg2)
 }
 #define do_prctl_sve_set_vl do_prctl_sve_set_vl
 
+static abi_long do_prctl_sme_get_vl(CPUArchState *env)
+{
+    ARMCPU *cpu = env_archcpu(env);
+    if (cpu_isar_feature(aa64_sme, cpu)) {
+        return sme_vq(env) * 16;
+    }
+    return -TARGET_EINVAL;
+}
+#define do_prctl_sme_get_vl do_prctl_sme_get_vl
+
+static abi_long do_prctl_sme_set_vl(CPUArchState *env, abi_long arg2)
+{
+    /*
+     * We cannot support either PR_SME_SET_VL_ONEXEC or PR_SME_VL_INHERIT.
+     * Note the kernel definition of sve_vl_valid allows for VQ=512,
+     * i.e. VL=8192, even though the architectural maximum is VQ=16.
+     */
+    if (cpu_isar_feature(aa64_sme, env_archcpu(env))
+        && arg2 >= 0 && arg2 <= 512 * 16 && !(arg2 & 15)) {
+        int vq, old_vq;
+
+        old_vq = sme_vq(env);
+
+        /*
+         * Bound the value of vq, so that we know that it fits into
+         * the 4-bit field in SMCR_EL1.  Because PSTATE.SM is cleared
+         * on syscall entry, we are not modifying the current SVE
+         * vector length.
+         */
+        vq = MAX(arg2 / 16, 1);
+        vq = MIN(vq, 16);
+        env->vfp.smcr_el[1] =
+            FIELD_DP64(env->vfp.smcr_el[1], SMCR, LEN, vq - 1);
+
+        /* Delay rebuilding hflags until we know if ZA must change. */
+        vq = sve_vqm1_for_el_sm(env, 0, true) + 1;
+
+        if (vq != old_vq) {
+            /*
+             * PSTATE.ZA state is cleared on any change to SVL.
+             * We need not call arm_rebuild_hflags because PSTATE.SM was
+             * cleared on syscall entry, so this hasn't changed VL.
+             */
+            env->svcr = FIELD_DP64(env->svcr, SVCR, ZA, 0);
+            arm_rebuild_hflags(env);
+        }
+        return vq * 16;
+    }
+    return -TARGET_EINVAL;
+}
+#define do_prctl_sme_set_vl do_prctl_sme_set_vl
+
 static abi_long do_prctl_reset_keys(CPUArchState *env, abi_long arg2)
 {
     ARMCPU *cpu = env_archcpu(env);
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index cbde82c907..991b85e6b4 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -6343,6 +6343,12 @@ abi_long do_arch_prctl(CPUX86State *env, int code, abi_ulong addr)
 #ifndef PR_SET_SYSCALL_USER_DISPATCH
 # define PR_SET_SYSCALL_USER_DISPATCH 59
 #endif
+#ifndef PR_SME_SET_VL
+# define PR_SME_SET_VL  63
+# define PR_SME_GET_VL  64
+# define PR_SME_VL_LEN_MASK  0xffff
+# define PR_SME_VL_INHERIT   (1 << 17)
+#endif
 
 #include "target_prctl.h"
 
@@ -6383,6 +6389,12 @@ static abi_long do_prctl_inval1(CPUArchState *env, abi_long arg2)
 #ifndef do_prctl_set_unalign
 #define do_prctl_set_unalign do_prctl_inval1
 #endif
+#ifndef do_prctl_sme_get_vl
+#define do_prctl_sme_get_vl do_prctl_inval0
+#endif
+#ifndef do_prctl_sme_set_vl
+#define do_prctl_sme_set_vl do_prctl_inval1
+#endif
 
 static abi_long do_prctl(CPUArchState *env, abi_long option, abi_long arg2,
                          abi_long arg3, abi_long arg4, abi_long arg5)
@@ -6434,6 +6446,10 @@ static abi_long do_prctl(CPUArchState *env, abi_long option, abi_long arg2,
         return do_prctl_sve_get_vl(env);
     case PR_SVE_SET_VL:
         return do_prctl_sve_set_vl(env, arg2);
+    case PR_SME_GET_VL:
+        return do_prctl_sme_get_vl(env);
+    case PR_SME_SET_VL:
+        return do_prctl_sme_set_vl(env, arg2);
     case PR_PAC_RESET_KEYS:
         if (arg3 || arg4 || arg5) {
             return -TARGET_EINVAL;
-- 
2.34.1



  parent reply	other threads:[~2022-07-08 15:35 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-08 15:14 [PATCH v6 00/45] target/arm: Scalable Matrix Extension Richard Henderson
2022-07-08 15:14 ` [PATCH v6 01/45] target/arm: Handle SME in aarch64_cpu_dump_state Richard Henderson
2022-07-08 15:14 ` [PATCH v6 02/45] target/arm: Add infrastructure for disas_sme Richard Henderson
2022-07-08 15:14 ` [PATCH v6 03/45] target/arm: Trap non-streaming usage when Streaming SVE is active Richard Henderson
2022-07-08 15:14 ` [PATCH v6 04/45] target/arm: Mark ADR as non-streaming Richard Henderson
2022-07-08 15:15 ` [PATCH v6 05/45] target/arm: Mark RDFFR, WRFFR, SETFFR " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 06/45] target/arm: Mark BDEP, BEXT, BGRP, COMPACT, FEXPA, FTSSEL " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 07/45] target/arm: Mark PMULL, FMMLA " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 08/45] target/arm: Mark FTSMUL, FTMAD, FADDA " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 09/45] target/arm: Mark SMMLA, UMMLA, USMMLA " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 10/45] target/arm: Mark string/histo/crypto " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 11/45] target/arm: Mark gather/scatter load/store " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 12/45] target/arm: Mark gather prefetch " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 13/45] target/arm: Mark LDFF1 and LDNF1 " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 14/45] target/arm: Mark LD1RO " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 15/45] target/arm: Add SME enablement checks Richard Henderson
2022-07-08 15:15 ` [PATCH v6 16/45] target/arm: Handle SME in sve_access_check Richard Henderson
2022-07-08 15:15 ` [PATCH v6 17/45] target/arm: Implement SME RDSVL, ADDSVL, ADDSPL Richard Henderson
2022-07-08 15:15 ` [PATCH v6 18/45] target/arm: Implement SME ZERO Richard Henderson
2022-07-08 15:15 ` [PATCH v6 19/45] target/arm: Implement SME MOVA Richard Henderson
2022-07-08 15:15 ` [PATCH v6 20/45] target/arm: Implement SME LD1, ST1 Richard Henderson
2022-07-08 15:15 ` [PATCH v6 21/45] target/arm: Export unpredicated ld/st from translate-sve.c Richard Henderson
2022-07-08 15:15 ` [PATCH v6 22/45] target/arm: Implement SME LDR, STR Richard Henderson
2022-07-08 15:15 ` [PATCH v6 23/45] target/arm: Implement SME ADDHA, ADDVA Richard Henderson
2022-07-08 15:15 ` [PATCH v6 24/45] target/arm: Implement FMOPA, FMOPS (non-widening) Richard Henderson
2022-07-08 15:15 ` [PATCH v6 25/45] target/arm: Implement BFMOPA, BFMOPS Richard Henderson
2022-07-08 15:15 ` [PATCH v6 26/45] target/arm: Implement FMOPA, FMOPS (widening) Richard Henderson
2022-07-08 15:15 ` [PATCH v6 27/45] target/arm: Implement SME integer outer product Richard Henderson
2022-07-08 15:15 ` [PATCH v6 28/45] target/arm: Implement PSEL Richard Henderson
2022-07-08 15:15 ` [PATCH v6 29/45] target/arm: Implement REVD Richard Henderson
2022-07-08 15:15 ` [PATCH v6 30/45] target/arm: Implement SCLAMP, UCLAMP Richard Henderson
2022-07-08 15:15 ` [PATCH v6 31/45] target/arm: Reset streaming sve state on exception boundaries Richard Henderson
2022-07-08 15:15 ` [PATCH v6 32/45] target/arm: Enable SME for -cpu max Richard Henderson
2022-07-08 15:15 ` [PATCH v6 33/45] linux-user/aarch64: Clear tpidr2_el0 if CLONE_SETTLS Richard Henderson
2022-07-08 15:15 ` [PATCH v6 34/45] linux-user/aarch64: Reset PSTATE.SM on syscalls Richard Henderson
2022-07-08 15:15 ` [PATCH v6 35/45] linux-user/aarch64: Add SM bit to SVE signal context Richard Henderson
2022-07-08 15:15 ` [PATCH v6 36/45] linux-user/aarch64: Tidy target_restore_sigframe error return Richard Henderson
2022-07-08 15:15 ` [PATCH v6 37/45] linux-user/aarch64: Do not allow duplicate or short sve records Richard Henderson
2022-07-08 15:15 ` [PATCH v6 38/45] linux-user/aarch64: Verify extra record lock succeeded Richard Henderson
2022-07-08 15:15 ` [PATCH v6 39/45] linux-user/aarch64: Move sve record checks into restore Richard Henderson
2022-07-08 15:15 ` [PATCH v6 40/45] linux-user/aarch64: Implement SME signal handling Richard Henderson
2022-07-08 15:15 ` [PATCH v6 41/45] linux-user: Rename sve prctls Richard Henderson
2022-07-08 15:15 ` Richard Henderson [this message]
2022-07-08 15:15 ` [PATCH v6 43/45] target/arm: Only set ZEN in reset if SVE present Richard Henderson
2022-07-08 15:15 ` [PATCH v6 44/45] target/arm: Enable SME for user-only Richard Henderson
2022-07-08 15:15 ` [PATCH v6 45/45] linux-user/aarch64: Add SME related hwcap entries Richard Henderson
2022-07-11 12:50 ` [PATCH v6 00/45] target/arm: Scalable Matrix Extension Peter Maydell

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