From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH v6 06/45] target/arm: Mark BDEP, BEXT, BGRP, COMPACT, FEXPA, FTSSEL as non-streaming
Date: Fri, 8 Jul 2022 20:45:01 +0530 [thread overview]
Message-ID: <20220708151540.18136-7-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220708151540.18136-1-richard.henderson@linaro.org>
Mark these as a non-streaming instructions, which should trap
if full a64 support is not enabled in streaming mode.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/sme-fa64.decode | 3 ---
target/arm/translate-sve.c | 22 ++++++++++++----------
2 files changed, 12 insertions(+), 13 deletions(-)
diff --git a/target/arm/sme-fa64.decode b/target/arm/sme-fa64.decode
index fa2b5cbf1a..4f515939d9 100644
--- a/target/arm/sme-fa64.decode
+++ b/target/arm/sme-fa64.decode
@@ -59,9 +59,6 @@ FAIL 0001 1110 0111 1110 0000 00-- ---- ---- # FJCVTZS
# --11 1100 --1- ---- ---- ---- ---- --10 # Load/store FP register (register offset)
# --11 1101 ---- ---- ---- ---- ---- ---- # Load/store FP register (scaled imm)
-FAIL 0000 0100 --1- ---- 1011 -0-- ---- ---- # FTSSEL, FEXPA
-FAIL 0000 0101 --10 0001 100- ---- ---- ---- # COMPACT
-FAIL 0100 0101 --0- ---- 1011 ---- ---- ---- # BDEP, BEXT, BGRP
FAIL 0100 0101 000- ---- 0110 1--- ---- ---- # PMULLB, PMULLT (128b result)
FAIL 0110 0100 --1- ---- 1110 01-- ---- ---- # FMMLA, BFMMLA
FAIL 0110 0101 --0- ---- 0000 11-- ---- ---- # FTSMUL
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index d6faec15fe..ae48040aa4 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -1333,14 +1333,15 @@ static gen_helper_gvec_2 * const fexpa_fns[4] = {
NULL, gen_helper_sve_fexpa_h,
gen_helper_sve_fexpa_s, gen_helper_sve_fexpa_d,
};
-TRANS_FEAT(FEXPA, aa64_sve, gen_gvec_ool_zz,
- fexpa_fns[a->esz], a->rd, a->rn, 0)
+TRANS_FEAT_NONSTREAMING(FEXPA, aa64_sve, gen_gvec_ool_zz,
+ fexpa_fns[a->esz], a->rd, a->rn, 0)
static gen_helper_gvec_3 * const ftssel_fns[4] = {
NULL, gen_helper_sve_ftssel_h,
gen_helper_sve_ftssel_s, gen_helper_sve_ftssel_d,
};
-TRANS_FEAT(FTSSEL, aa64_sve, gen_gvec_ool_arg_zzz, ftssel_fns[a->esz], a, 0)
+TRANS_FEAT_NONSTREAMING(FTSSEL, aa64_sve, gen_gvec_ool_arg_zzz,
+ ftssel_fns[a->esz], a, 0)
/*
*** SVE Predicate Logical Operations Group
@@ -2536,7 +2537,8 @@ TRANS_FEAT(TRN2_q, aa64_sve_f64mm, gen_gvec_ool_arg_zzz,
static gen_helper_gvec_3 * const compact_fns[4] = {
NULL, NULL, gen_helper_sve_compact_s, gen_helper_sve_compact_d
};
-TRANS_FEAT(COMPACT, aa64_sve, gen_gvec_ool_arg_zpz, compact_fns[a->esz], a, 0)
+TRANS_FEAT_NONSTREAMING(COMPACT, aa64_sve, gen_gvec_ool_arg_zpz,
+ compact_fns[a->esz], a, 0)
/* Call the helper that computes the ARM LastActiveElement pseudocode
* function, scaled by the element size. This includes the not found
@@ -6374,22 +6376,22 @@ static gen_helper_gvec_3 * const bext_fns[4] = {
gen_helper_sve2_bext_b, gen_helper_sve2_bext_h,
gen_helper_sve2_bext_s, gen_helper_sve2_bext_d,
};
-TRANS_FEAT(BEXT, aa64_sve2_bitperm, gen_gvec_ool_arg_zzz,
- bext_fns[a->esz], a, 0)
+TRANS_FEAT_NONSTREAMING(BEXT, aa64_sve2_bitperm, gen_gvec_ool_arg_zzz,
+ bext_fns[a->esz], a, 0)
static gen_helper_gvec_3 * const bdep_fns[4] = {
gen_helper_sve2_bdep_b, gen_helper_sve2_bdep_h,
gen_helper_sve2_bdep_s, gen_helper_sve2_bdep_d,
};
-TRANS_FEAT(BDEP, aa64_sve2_bitperm, gen_gvec_ool_arg_zzz,
- bdep_fns[a->esz], a, 0)
+TRANS_FEAT_NONSTREAMING(BDEP, aa64_sve2_bitperm, gen_gvec_ool_arg_zzz,
+ bdep_fns[a->esz], a, 0)
static gen_helper_gvec_3 * const bgrp_fns[4] = {
gen_helper_sve2_bgrp_b, gen_helper_sve2_bgrp_h,
gen_helper_sve2_bgrp_s, gen_helper_sve2_bgrp_d,
};
-TRANS_FEAT(BGRP, aa64_sve2_bitperm, gen_gvec_ool_arg_zzz,
- bgrp_fns[a->esz], a, 0)
+TRANS_FEAT_NONSTREAMING(BGRP, aa64_sve2_bitperm, gen_gvec_ool_arg_zzz,
+ bgrp_fns[a->esz], a, 0)
static gen_helper_gvec_3 * const cadd_fns[4] = {
gen_helper_sve2_cadd_b, gen_helper_sve2_cadd_h,
--
2.34.1
next prev parent reply other threads:[~2022-07-08 15:24 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-08 15:14 [PATCH v6 00/45] target/arm: Scalable Matrix Extension Richard Henderson
2022-07-08 15:14 ` [PATCH v6 01/45] target/arm: Handle SME in aarch64_cpu_dump_state Richard Henderson
2022-07-08 15:14 ` [PATCH v6 02/45] target/arm: Add infrastructure for disas_sme Richard Henderson
2022-07-08 15:14 ` [PATCH v6 03/45] target/arm: Trap non-streaming usage when Streaming SVE is active Richard Henderson
2022-07-08 15:14 ` [PATCH v6 04/45] target/arm: Mark ADR as non-streaming Richard Henderson
2022-07-08 15:15 ` [PATCH v6 05/45] target/arm: Mark RDFFR, WRFFR, SETFFR " Richard Henderson
2022-07-08 15:15 ` Richard Henderson [this message]
2022-07-08 15:15 ` [PATCH v6 07/45] target/arm: Mark PMULL, FMMLA " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 08/45] target/arm: Mark FTSMUL, FTMAD, FADDA " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 09/45] target/arm: Mark SMMLA, UMMLA, USMMLA " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 10/45] target/arm: Mark string/histo/crypto " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 11/45] target/arm: Mark gather/scatter load/store " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 12/45] target/arm: Mark gather prefetch " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 13/45] target/arm: Mark LDFF1 and LDNF1 " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 14/45] target/arm: Mark LD1RO " Richard Henderson
2022-07-08 15:15 ` [PATCH v6 15/45] target/arm: Add SME enablement checks Richard Henderson
2022-07-08 15:15 ` [PATCH v6 16/45] target/arm: Handle SME in sve_access_check Richard Henderson
2022-07-08 15:15 ` [PATCH v6 17/45] target/arm: Implement SME RDSVL, ADDSVL, ADDSPL Richard Henderson
2022-07-08 15:15 ` [PATCH v6 18/45] target/arm: Implement SME ZERO Richard Henderson
2022-07-08 15:15 ` [PATCH v6 19/45] target/arm: Implement SME MOVA Richard Henderson
2022-07-08 15:15 ` [PATCH v6 20/45] target/arm: Implement SME LD1, ST1 Richard Henderson
2022-07-08 15:15 ` [PATCH v6 21/45] target/arm: Export unpredicated ld/st from translate-sve.c Richard Henderson
2022-07-08 15:15 ` [PATCH v6 22/45] target/arm: Implement SME LDR, STR Richard Henderson
2022-07-08 15:15 ` [PATCH v6 23/45] target/arm: Implement SME ADDHA, ADDVA Richard Henderson
2022-07-08 15:15 ` [PATCH v6 24/45] target/arm: Implement FMOPA, FMOPS (non-widening) Richard Henderson
2022-07-08 15:15 ` [PATCH v6 25/45] target/arm: Implement BFMOPA, BFMOPS Richard Henderson
2022-07-08 15:15 ` [PATCH v6 26/45] target/arm: Implement FMOPA, FMOPS (widening) Richard Henderson
2022-07-08 15:15 ` [PATCH v6 27/45] target/arm: Implement SME integer outer product Richard Henderson
2022-07-08 15:15 ` [PATCH v6 28/45] target/arm: Implement PSEL Richard Henderson
2022-07-08 15:15 ` [PATCH v6 29/45] target/arm: Implement REVD Richard Henderson
2022-07-08 15:15 ` [PATCH v6 30/45] target/arm: Implement SCLAMP, UCLAMP Richard Henderson
2022-07-08 15:15 ` [PATCH v6 31/45] target/arm: Reset streaming sve state on exception boundaries Richard Henderson
2022-07-08 15:15 ` [PATCH v6 32/45] target/arm: Enable SME for -cpu max Richard Henderson
2022-07-08 15:15 ` [PATCH v6 33/45] linux-user/aarch64: Clear tpidr2_el0 if CLONE_SETTLS Richard Henderson
2022-07-08 15:15 ` [PATCH v6 34/45] linux-user/aarch64: Reset PSTATE.SM on syscalls Richard Henderson
2022-07-08 15:15 ` [PATCH v6 35/45] linux-user/aarch64: Add SM bit to SVE signal context Richard Henderson
2022-07-08 15:15 ` [PATCH v6 36/45] linux-user/aarch64: Tidy target_restore_sigframe error return Richard Henderson
2022-07-08 15:15 ` [PATCH v6 37/45] linux-user/aarch64: Do not allow duplicate or short sve records Richard Henderson
2022-07-08 15:15 ` [PATCH v6 38/45] linux-user/aarch64: Verify extra record lock succeeded Richard Henderson
2022-07-08 15:15 ` [PATCH v6 39/45] linux-user/aarch64: Move sve record checks into restore Richard Henderson
2022-07-08 15:15 ` [PATCH v6 40/45] linux-user/aarch64: Implement SME signal handling Richard Henderson
2022-07-08 15:15 ` [PATCH v6 41/45] linux-user: Rename sve prctls Richard Henderson
2022-07-08 15:15 ` [PATCH v6 42/45] linux-user/aarch64: Implement PR_SME_GET_VL, PR_SME_SET_VL Richard Henderson
2022-07-08 15:15 ` [PATCH v6 43/45] target/arm: Only set ZEN in reset if SVE present Richard Henderson
2022-07-08 15:15 ` [PATCH v6 44/45] target/arm: Enable SME for user-only Richard Henderson
2022-07-08 15:15 ` [PATCH v6 45/45] linux-user/aarch64: Add SME related hwcap entries Richard Henderson
2022-07-11 12:50 ` [PATCH v6 00/45] target/arm: Scalable Matrix Extension Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220708151540.18136-7-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).