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From: Weiwei Li <liweiwei@iscas.ac.cn>
To: palmer@dabbelt.com, alistair.francis@wdc.com,
	bin.meng@windriver.com, qemu-riscv@nongnu.org,
	qemu-devel@nongnu.org
Cc: wangjunqiang@iscas.ac.cn, lazyparser@gmail.com,
	Weiwei Li <liweiwei@iscas.ac.cn>
Subject: [PATCH 4/6] target/riscv: add check for csrs existed with U extension
Date: Sun, 10 Jul 2022 16:23:58 +0800	[thread overview]
Message-ID: <20220710082400.29224-5-liweiwei@iscas.ac.cn> (raw)
In-Reply-To: <20220710082400.29224-1-liweiwei@iscas.ac.cn>

- add umode/umode32 predicate for mcounteren,menvcfg/menvcfgh

Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
---
 target/riscv/csr.c | 25 ++++++++++++++++++++++---
 1 file changed, 22 insertions(+), 3 deletions(-)

diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 9bda1ff993..0d8e98b7a9 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -339,6 +339,25 @@ static RISCVException hmode32(CPURISCVState *env, int csrno)
 
 }
 
+static RISCVException umode(CPURISCVState *env, int csrno)
+{
+    if (riscv_has_ext(env, RVU)) {
+        /* User extension is supported */
+        return RISCV_EXCP_NONE;
+    }
+
+    return RISCV_EXCP_ILLEGAL_INST;
+}
+
+static RISCVException umode32(CPURISCVState *env, int csrno)
+{
+    if (riscv_cpu_mxl(env) != MXL_RV32) {
+        return RISCV_EXCP_ILLEGAL_INST;
+    }
+
+    return umode(env, csrno);
+}
+
 /* Checks if PointerMasking registers could be accessed */
 static RISCVException pointer_masking(CPURISCVState *env, int csrno)
 {
@@ -3521,7 +3540,7 @@ riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
     [CSR_MEDELEG]     = { "medeleg",    any,   read_medeleg,  write_medeleg },
     [CSR_MIE]         = { "mie",        any,   NULL,  NULL,   rmw_mie       },
     [CSR_MTVEC]       = { "mtvec",      any,   read_mtvec,    write_mtvec   },
-    [CSR_MCOUNTEREN]  = { "mcounteren", any,   read_mcounteren,
+    [CSR_MCOUNTEREN]  = { "mcounteren", umode, read_mcounteren,
                                                write_mcounteren             },
 
     [CSR_MSTATUSH]    = { "mstatush", any32, read_mstatush, write_mstatush  },
@@ -3554,9 +3573,9 @@ riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
     [CSR_MIPH]     = { "miph",     aia_any32, NULL, NULL, rmw_miph     },
 
     /* Execution environment configuration */
-    [CSR_MENVCFG]  = { "menvcfg",  any,   read_menvcfg,  write_menvcfg,
+    [CSR_MENVCFG]  = { "menvcfg",  umode, read_menvcfg,  write_menvcfg,
                                     .min_priv_ver = PRIV_VERSION_1_12_0 },
-    [CSR_MENVCFGH] = { "menvcfgh", any32, read_menvcfgh, write_menvcfgh,
+    [CSR_MENVCFGH] = { "menvcfgh", umode32, read_menvcfgh, write_menvcfgh,
                                     .min_priv_ver = PRIV_VERSION_1_12_0 },
     [CSR_SENVCFG]  = { "senvcfg",  smode, read_senvcfg,  write_senvcfg,
                                     .min_priv_ver = PRIV_VERSION_1_12_0 },
-- 
2.17.1



  parent reply	other threads:[~2022-07-10  8:29 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-10  8:23 [PATCH 0/6] Improve the U/S/H extension related check Weiwei Li
2022-07-10  8:23 ` [PATCH 1/6] target/riscv: add check for supported privilege modes conbinations Weiwei Li
2022-07-11  5:29   ` Alistair Francis
2022-07-10  8:23 ` [PATCH 2/6] target/riscv: H extension depends on I extension Weiwei Li
2022-07-11  5:29   ` Alistair Francis
2022-07-10  8:23 ` [PATCH 3/6] target/riscv: fix checkpatch warning may triggered in csr_ops table Weiwei Li
2022-07-11  6:41   ` Alistair Francis
2022-07-11 12:41     ` Weiwei Li
2022-07-10  8:23 ` Weiwei Li [this message]
2022-07-11  6:42   ` [PATCH 4/6] target/riscv: add check for csrs existed with U extension Alistair Francis
2022-07-10  8:23 ` [PATCH 5/6] target/riscv: fix checks in hmode/hmode32 Weiwei Li
2022-07-11  6:46   ` Alistair Francis
2022-07-11 12:45     ` Weiwei Li
2022-07-10  8:24 ` [PATCH 6/6] target/riscv: simplify the check in hmode to resue the check in riscv_csrrw_check Weiwei Li
2022-07-11  6:49   ` Alistair Francis

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