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From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Igor Mammedov <imammedo@redhat.com>,
	Ben Widawsky <ben.widawsky@intel.com>
Subject: [PULL 04/16] hw/cxl: Fix size of constant in interleave granularity function.
Date: Tue, 26 Jul 2022 15:40:34 -0400	[thread overview]
Message-ID: <20220726193858.177462-5-mst@redhat.com> (raw)
In-Reply-To: <20220726193858.177462-1-mst@redhat.com>

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Whilst the interleave granularity is always small enough that this isn't
a real problem (much less than 4GiB) let's change the constant
to ULL to fix the coverity warning.

Reported-by: Peter Maydell <peter.maydell@linaro.org>
Fixes: 829de299d1 ("hw/cxl/component: Add utils for interleave parameter encoding/decoding")
Fixes: Coverity CID 1488868
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20220701132300.2264-4-Jonathan.Cameron@huawei.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 include/hw/cxl/cxl_component.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/hw/cxl/cxl_component.h b/include/hw/cxl/cxl_component.h
index 70b5018156..94ec2f07d7 100644
--- a/include/hw/cxl/cxl_component.h
+++ b/include/hw/cxl/cxl_component.h
@@ -215,7 +215,7 @@ uint8_t cxl_interleave_granularity_enc(uint64_t gran, Error **errp);
 
 static inline hwaddr cxl_decode_ig(int ig)
 {
-    return 1 << (ig + 8);
+    return 1ULL << (ig + 8);
 }
 
 CXLComponentState *cxl_get_hb_cstate(PCIHostState *hb);
-- 
MST



  parent reply	other threads:[~2022-07-26 20:29 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-26 19:40 [PULL 00/16] pc,virtio: fixes Michael S. Tsirkin
2022-07-26 19:40 ` [PULL 01/16] acpi/nvdimm: Define trace events for NVDIMM and substitute nvdimm_debug() Michael S. Tsirkin
2022-07-26 19:40 ` [PULL 02/16] hw/machine: Clear out left over CXL related pointer from move of state handling to machines Michael S. Tsirkin
2022-07-26 19:40 ` [PULL 03/16] hw/i386/pc: Always place CXL Memory Regions after device_memory Michael S. Tsirkin
2022-07-26 19:40 ` Michael S. Tsirkin [this message]
2022-07-26 19:40 ` [PULL 05/16] hw/i386: add 4g boundary start to X86MachineState Michael S. Tsirkin
2022-07-26 19:40 ` [PULL 06/16] i386/pc: create pci-host qdev prior to pc_memory_init() Michael S. Tsirkin
2022-07-26 19:40 ` [PULL 07/16] i386/pc: pass pci_hole64_size " Michael S. Tsirkin
2022-07-26 19:40 ` [PULL 08/16] i386/pc: factor out above-4g end to an helper Michael S. Tsirkin
2022-07-26 19:40 ` [PULL 09/16] i386/pc: factor out cxl range end to helper Michael S. Tsirkin
2022-07-26 19:40 ` [PULL 10/16] i386/pc: factor out cxl range start " Michael S. Tsirkin
2022-07-26 19:40 ` [PULL 11/16] i386/pc: handle unitialized mr in pc_get_cxl_range_end() Michael S. Tsirkin
2022-07-26 19:40 ` [PULL 12/16] i386/pc: factor out device_memory base/size to helper Michael S. Tsirkin
2022-07-26 19:40 ` [PULL 13/16] i386/pc: bounds check phys-bits against max used GPA Michael S. Tsirkin
2022-07-26 19:40 ` [PULL 14/16] i386/pc: relocate 4g start to 1T where applicable Michael S. Tsirkin
2022-07-26 19:40 ` [PULL 15/16] i386/pc: restrict AMD only enforcing of 1Tb hole to new machine type Michael S. Tsirkin
2022-07-26 19:41 ` [PULL 16/16] hw/virtio/virtio-iommu: Enforce power-of-two notify for both MAP and UNMAP Michael S. Tsirkin
2022-07-26 21:51 ` [PULL 00/16] pc,virtio: fixes Richard Henderson

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