From: Stafford Horne <shorne@gmail.com>
To: QEMU Development <qemu-devel@nongnu.org>
Cc: Openrisc <openrisc@lists.librecores.org>,
Richard Henderson <richard.henderson@linaro.org>,
Stafford Horne <shorne@gmail.com>, Jia Liu <proljc@gmail.com>
Subject: [PATCH v3 01/11] hw/openrisc: Split re-usable boot time apis out to boot.c
Date: Sat, 30 Jul 2022 08:01:07 +0900 [thread overview]
Message-ID: <20220729230117.3768312-2-shorne@gmail.com> (raw)
In-Reply-To: <20220729230117.3768312-1-shorne@gmail.com>
These will be shared with the virt platform.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
---
Since v2:
- No changes
hw/openrisc/boot.c | 117 +++++++++++++++++++++++++++++++++++++
hw/openrisc/meson.build | 1 +
hw/openrisc/openrisc_sim.c | 106 ++-------------------------------
include/hw/openrisc/boot.h | 34 +++++++++++
4 files changed, 158 insertions(+), 100 deletions(-)
create mode 100644 hw/openrisc/boot.c
create mode 100644 include/hw/openrisc/boot.h
diff --git a/hw/openrisc/boot.c b/hw/openrisc/boot.c
new file mode 100644
index 0000000000..ca773b385e
--- /dev/null
+++ b/hw/openrisc/boot.c
@@ -0,0 +1,117 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * QEMU OpenRISC boot helpers.
+ *
+ * (c) 2022 Stafford Horne <shorne@gmail.com>
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "exec/cpu-defs.h"
+#include "elf.h"
+#include "hw/loader.h"
+#include "hw/openrisc/boot.h"
+#include "sysemu/device_tree.h"
+#include "sysemu/qtest.h"
+
+#include <libfdt.h>
+
+#define KERNEL_LOAD_ADDR 0x100
+
+hwaddr openrisc_load_kernel(ram_addr_t ram_size,
+ const char *kernel_filename,
+ uint32_t *bootstrap_pc)
+{
+ long kernel_size;
+ uint64_t elf_entry;
+ uint64_t high_addr;
+ hwaddr entry;
+
+ if (kernel_filename && !qtest_enabled()) {
+ kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
+ &elf_entry, NULL, &high_addr, NULL, 1,
+ EM_OPENRISC, 1, 0);
+ entry = elf_entry;
+ if (kernel_size < 0) {
+ kernel_size = load_uimage(kernel_filename,
+ &entry, NULL, NULL, NULL, NULL);
+ high_addr = entry + kernel_size;
+ }
+ if (kernel_size < 0) {
+ kernel_size = load_image_targphys(kernel_filename,
+ KERNEL_LOAD_ADDR,
+ ram_size - KERNEL_LOAD_ADDR);
+ high_addr = KERNEL_LOAD_ADDR + kernel_size;
+ }
+
+ if (entry <= 0) {
+ entry = KERNEL_LOAD_ADDR;
+ }
+
+ if (kernel_size < 0) {
+ error_report("couldn't load the kernel '%s'", kernel_filename);
+ exit(1);
+ }
+ *bootstrap_pc = entry;
+
+ return high_addr;
+ }
+ return 0;
+}
+
+hwaddr openrisc_load_initrd(void *fdt, const char *filename,
+ hwaddr load_start, uint64_t mem_size)
+{
+ int size;
+ hwaddr start;
+
+ /* We put the initrd right after the kernel; page aligned. */
+ start = TARGET_PAGE_ALIGN(load_start);
+
+ size = load_ramdisk(filename, start, mem_size - start);
+ if (size < 0) {
+ size = load_image_targphys(filename, start, mem_size - start);
+ if (size < 0) {
+ error_report("could not load ramdisk '%s'", filename);
+ exit(1);
+ }
+ }
+
+ if (fdt) {
+ qemu_fdt_setprop_cell(fdt, "/chosen",
+ "linux,initrd-start", start);
+ qemu_fdt_setprop_cell(fdt, "/chosen",
+ "linux,initrd-end", start + size);
+ }
+
+ return start + size;
+}
+
+uint32_t openrisc_load_fdt(void *fdt, hwaddr load_start,
+ uint64_t mem_size)
+{
+ uint32_t fdt_addr;
+ int ret;
+ int fdtsize = fdt_totalsize(fdt);
+
+ if (fdtsize <= 0) {
+ error_report("invalid device-tree");
+ exit(1);
+ }
+
+ /* We put fdt right after the kernel and/or initrd. */
+ fdt_addr = TARGET_PAGE_ALIGN(load_start);
+
+ ret = fdt_pack(fdt);
+ /* Should only fail if we've built a corrupted tree */
+ g_assert(ret == 0);
+ /* copy in the device tree */
+ qemu_fdt_dumpdtb(fdt, fdtsize);
+
+ rom_add_blob_fixed_as("fdt", fdt, fdtsize, fdt_addr,
+ &address_space_memory);
+
+ return fdt_addr;
+}
+
diff --git a/hw/openrisc/meson.build b/hw/openrisc/meson.build
index ec48172c9d..ab563820c5 100644
--- a/hw/openrisc/meson.build
+++ b/hw/openrisc/meson.build
@@ -1,5 +1,6 @@
openrisc_ss = ss.source_set()
openrisc_ss.add(files('cputimer.c'))
+openrisc_ss.add(files('boot.c'))
openrisc_ss.add(when: 'CONFIG_OR1K_SIM', if_true: [files('openrisc_sim.c'), fdt])
hw_arch += {'openrisc': openrisc_ss}
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 35adce17ac..35da123aef 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -24,10 +24,9 @@
#include "cpu.h"
#include "hw/irq.h"
#include "hw/boards.h"
-#include "elf.h"
#include "hw/char/serial.h"
#include "net/net.h"
-#include "hw/loader.h"
+#include "hw/openrisc/boot.h"
#include "hw/qdev-properties.h"
#include "exec/address-spaces.h"
#include "sysemu/device_tree.h"
@@ -283,101 +282,6 @@ static void openrisc_sim_serial_init(Or1ksimState *state, hwaddr base,
g_free(nodename);
}
-static hwaddr openrisc_load_kernel(ram_addr_t ram_size,
- const char *kernel_filename)
-{
- long kernel_size;
- uint64_t elf_entry;
- uint64_t high_addr;
- hwaddr entry;
-
- if (kernel_filename && !qtest_enabled()) {
- kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
- &elf_entry, NULL, &high_addr, NULL, 1,
- EM_OPENRISC, 1, 0);
- entry = elf_entry;
- if (kernel_size < 0) {
- kernel_size = load_uimage(kernel_filename,
- &entry, NULL, NULL, NULL, NULL);
- high_addr = entry + kernel_size;
- }
- if (kernel_size < 0) {
- kernel_size = load_image_targphys(kernel_filename,
- KERNEL_LOAD_ADDR,
- ram_size - KERNEL_LOAD_ADDR);
- high_addr = KERNEL_LOAD_ADDR + kernel_size;
- }
-
- if (entry <= 0) {
- entry = KERNEL_LOAD_ADDR;
- }
-
- if (kernel_size < 0) {
- error_report("couldn't load the kernel '%s'", kernel_filename);
- exit(1);
- }
- boot_info.bootstrap_pc = entry;
-
- return high_addr;
- }
- return 0;
-}
-
-static hwaddr openrisc_load_initrd(Or1ksimState *state, const char *filename,
- hwaddr load_start, uint64_t mem_size)
-{
- void *fdt = state->fdt;
- int size;
- hwaddr start;
-
- /* We put the initrd right after the kernel; page aligned. */
- start = TARGET_PAGE_ALIGN(load_start);
-
- size = load_ramdisk(filename, start, mem_size - start);
- if (size < 0) {
- size = load_image_targphys(filename, start, mem_size - start);
- if (size < 0) {
- error_report("could not load ramdisk '%s'", filename);
- exit(1);
- }
- }
-
- qemu_fdt_setprop_cell(fdt, "/chosen",
- "linux,initrd-start", start);
- qemu_fdt_setprop_cell(fdt, "/chosen",
- "linux,initrd-end", start + size);
-
- return start + size;
-}
-
-static uint32_t openrisc_load_fdt(Or1ksimState *state, hwaddr load_start,
- uint64_t mem_size)
-{
- void *fdt = state->fdt;
- uint32_t fdt_addr;
- int ret;
- int fdtsize = fdt_totalsize(fdt);
-
- if (fdtsize <= 0) {
- error_report("invalid device-tree");
- exit(1);
- }
-
- /* We put fdt right after the kernel and/or initrd. */
- fdt_addr = TARGET_PAGE_ALIGN(load_start);
-
- ret = fdt_pack(fdt);
- /* Should only fail if we've built a corrupted tree */
- g_assert(ret == 0);
- /* copy in the device tree */
- qemu_fdt_dumpdtb(fdt, fdtsize);
-
- rom_add_blob_fixed_as("fdt", fdt, fdtsize, fdt_addr,
- &address_space_memory);
-
- return fdt_addr;
-}
-
static void openrisc_sim_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;
@@ -428,13 +332,15 @@ static void openrisc_sim_init(MachineState *machine)
or1ksim_memmap[OR1KSIM_UART].size,
smp_cpus, cpus, OR1KSIM_UART_IRQ, n);
- load_addr = openrisc_load_kernel(ram_size, kernel_filename);
+ load_addr = openrisc_load_kernel(ram_size, kernel_filename,
+ &boot_info.bootstrap_pc);
if (load_addr > 0) {
if (machine->initrd_filename) {
- load_addr = openrisc_load_initrd(state, machine->initrd_filename,
+ load_addr = openrisc_load_initrd(state->fdt,
+ machine->initrd_filename,
load_addr, machine->ram_size);
}
- boot_info.fdt_addr = openrisc_load_fdt(state, load_addr,
+ boot_info.fdt_addr = openrisc_load_fdt(state->fdt, load_addr,
machine->ram_size);
}
}
diff --git a/include/hw/openrisc/boot.h b/include/hw/openrisc/boot.h
new file mode 100644
index 0000000000..25a313d63a
--- /dev/null
+++ b/include/hw/openrisc/boot.h
@@ -0,0 +1,34 @@
+/*
+ * QEMU OpenRISC boot helpers.
+ *
+ * Copyright (c) 2022 Stafford Horne <shorne@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2 or later, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef OPENRISC_BOOT_H
+#define OPENRISC_BOOT_H
+
+#include "exec/cpu-defs.h"
+
+hwaddr openrisc_load_kernel(ram_addr_t ram_size,
+ const char *kernel_filename,
+ uint32_t *bootstrap_pc);
+
+hwaddr openrisc_load_initrd(void *fdt, const char *filename,
+ hwaddr load_start, uint64_t mem_size);
+
+uint32_t openrisc_load_fdt(void *fdt, hwaddr load_start,
+ uint64_t mem_size);
+
+#endif /* OPENRISC_BOOT_H */
--
2.37.1
next prev parent reply other threads:[~2022-07-29 23:07 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-29 23:01 [PATCH v3 00/11] OpenRISC Virtual Machine Stafford Horne
2022-07-29 23:01 ` Stafford Horne [this message]
2022-07-29 23:01 ` [PATCH v3 02/11] target/openrisc: Fix memory reading in debugger Stafford Horne
2022-07-29 23:01 ` [PATCH v3 03/11] goldfish_rtc: Add big-endian property Stafford Horne
2022-07-29 23:39 ` Richard Henderson
2022-07-29 23:01 ` [PATCH v3 04/11] hw/openrisc: Add the OpenRISC virtual machine Stafford Horne
2022-07-29 23:01 ` [PATCH v3 05/11] hw/openrisc: Add PCI bus support to virt Stafford Horne
2022-07-29 23:01 ` [PATCH v3 06/11] hw/openrisc: Initialize timer time at startup Stafford Horne
2022-07-29 23:42 ` Richard Henderson
2022-07-29 23:01 ` [PATCH v3 07/11] target/openrisc: Add interrupted CPU to log Stafford Horne
2022-07-29 23:01 ` [PATCH v3 08/11] target/openrisc: Enable MTTCG Stafford Horne
2022-07-29 23:42 ` Richard Henderson
2022-08-02 2:03 ` Stafford Horne
2022-07-29 23:01 ` [PATCH v3 09/11] target/openrisc: Interrupt handling fixes Stafford Horne
2022-07-29 23:01 ` [PATCH v3 10/11] hw/openrisc: virt: pass random seed to fdt Stafford Horne
2022-07-29 23:01 ` [PATCH v3 11/11] docs/system: openrisc: Add OpenRISC documentation Stafford Horne
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