From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>
Subject: [PATCH v2 01/10] target/arm: Don't corrupt high half of PMOVSR when cycle counter overflows
Date: Mon, 22 Aug 2022 14:23:49 +0100 [thread overview]
Message-ID: <20220822132358.3524971-2-peter.maydell@linaro.org> (raw)
In-Reply-To: <20220822132358.3524971-1-peter.maydell@linaro.org>
When the cycle counter overflows, we are intended to set bit 31 in PMOVSR
to indicate this. However a missing ULL suffix means that we end up
setting all of bits 63-31. Fix the bug.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index d7bc467a2a5..87c89748954 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -1186,7 +1186,7 @@ static void pmccntr_op_start(CPUARMState *env)
uint64_t overflow_mask = env->cp15.c9_pmcr & PMCRLC ? \
1ull << 63 : 1ull << 31;
if (env->cp15.c15_ccnt & ~new_pmccntr & overflow_mask) {
- env->cp15.c9_pmovsr |= (1 << 31);
+ env->cp15.c9_pmovsr |= (1ULL << 31);
pmu_update_irq(env);
}
--
2.25.1
next prev parent reply other threads:[~2022-08-22 13:29 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-22 13:23 [PATCH v2 00/10] target/arm: Implement FEAT_PMUv3p5 Peter Maydell
2022-08-22 13:23 ` Peter Maydell [this message]
2022-08-22 13:23 ` [PATCH v2 02/10] target/arm: Correct value returned by pmu_counter_mask() Peter Maydell
2022-08-22 13:23 ` [PATCH v2 03/10] target/arm: Don't mishandle count when enabling or disabling PMU counters Peter Maydell
2022-10-03 8:54 ` Alex Bennée
2022-10-03 9:32 ` Peter Maydell
2022-08-22 13:23 ` [PATCH v2 04/10] target/arm: Ignore PMCR.D when PMCR.LC is set Peter Maydell
2022-08-22 13:23 ` [PATCH v2 05/10] target/arm: Honour MDCR_EL2.HPMD in Secure EL2 Peter Maydell
2022-08-22 13:23 ` [PATCH v2 06/10] target/arm: Detect overflow when calculating next PMU interrupt Peter Maydell
2022-08-22 13:23 ` [PATCH v2 07/10] target/arm: Rename pmu_8_n feature test functions Peter Maydell
2022-08-22 13:23 ` [PATCH v2 08/10] target/arm: Implement FEAT_PMUv3p5 cycle counter disable bits Peter Maydell
2022-08-22 16:15 ` Richard Henderson
2022-08-22 13:23 ` [PATCH v2 09/10] target/arm: Support 64-bit event counters for FEAT_PMUv3p5 Peter Maydell
2022-08-22 13:23 ` [PATCH v2 10/10] target/arm: Report FEAT_PMUv3p5 for TCG '-cpu max' Peter Maydell
2022-08-23 21:53 ` [PATCH v2 00/10] target/arm: Implement FEAT_PMUv3p5 Richard Henderson
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