[PATCH 10/17] target/i386: add 48-4f, 58-5f opcodes

[Paolo Bonzini <pbonzini@redhat.com>]

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/tcg/decode-new.c.inc | 16 ++++++++++++++++
 target/i386/tcg/decode-old.c.inc |  2 +-
 target/i386/tcg/emit.c.inc       |  5 +++++
 3 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index bbd6ef07a1..586894e4ee 100644
--- a/target/i386/tcg/decode-new.c.inc
+++ b/target/i386/tcg/decode-new.c.inc
@@ -587,8 +587,24 @@ static X86OpEntry A2_08_FF[16][8] = {
         X86_OP_ENTRY0(AAS, i64),
     },
     {
+        X86_OP_ENTRY1(DEC, 0,v, i64),
+        X86_OP_ENTRY1(DEC, 1,v, i64),
+        X86_OP_ENTRY1(DEC, 2,v, i64),
+        X86_OP_ENTRY1(DEC, 3,v, i64),
+        X86_OP_ENTRY1(DEC, 4,v, i64),
+        X86_OP_ENTRY1(DEC, 5,v, i64),
+        X86_OP_ENTRY1(DEC, 6,v, i64),
+        X86_OP_ENTRY1(DEC, 7,v, i64),
     },
     {
+        X86_OP_ENTRYw(POP, LoBits,d64),
+        X86_OP_ENTRYw(POP, LoBits,d64),
+        X86_OP_ENTRYw(POP, LoBits,d64),
+        X86_OP_ENTRYw(POP, LoBits,d64),
+        X86_OP_ENTRYw(POP, LoBits,d64),
+        X86_OP_ENTRYw(POP, LoBits,d64),
+        X86_OP_ENTRYw(POP, LoBits,d64),
+        X86_OP_ENTRYw(POP, LoBits,d64),
     },
     {
     },
diff --git a/target/i386/tcg/decode-old.c.inc b/target/i386/tcg/decode-old.c.inc
index 28edb62b5b..a297d126a4 100644
--- a/target/i386/tcg/decode-old.c.inc
+++ b/target/i386/tcg/decode-old.c.inc
@@ -1821,7 +1821,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 #else
         use_new &= b <= limit;
 #endif
-        if (use_new && b <= 0x3f) {
+        if (use_new && b <= 0x5f) {
             return disas_insn_new(s, cpu, b);
         }
     case 0x0f:
diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index d3d0f893fb..a76d6820e1 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -191,6 +191,11 @@ static void gen_DAS(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
     set_cc_op(s, CC_OP_EFLAGS);
 }
 
+static void gen_DEC(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
+{
+    gen_alu_op(s, OP_DECL, decode->op[0].ot);
+}
+
 static void gen_INC(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
 {
     gen_alu_op(s, OP_INCL, decode->op[0].ot);
-- 
2.37.1