From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com,
peter.maydell@linaro.org, richard.henderson@linaro.org,
"Cédric Le Goater" <clg@kaod.org>,
"Frederic Barrat" <fbarrat@linux.ibm.com>
Subject: [PULL 20/60] ppc/pnv: set root port chassis and slot using Bus properties
Date: Wed, 31 Aug 2022 15:49:54 -0300 [thread overview]
Message-ID: <20220831185034.23240-21-danielhb413@gmail.com> (raw)
In-Reply-To: <20220831185034.23240-1-danielhb413@gmail.com>
For default root ports we have a way of accessing chassis and slot,
before root_port_realize(), via pnv_phb_attach_root_port(). For the
future user created root ports this won't be the case: we can't use
this helper because we don't have access to the PHB phb-id/chip-id
values.
In earlier patches we've added phb-id and chip-id to pnv-phb-root-bus
objects. We're now able to use the bus to retrieve them. The bus is
reachable for both user created and default devices, so we're changing
all the code paths. This also allow us to validate these changes with
the existing default devices.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <20220811163950.578927-4-danielhb413@gmail.com>
---
hw/pci-host/pnv_phb.c | 25 ++++++++++++++++---------
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c
index c47ed92462..826c0c144e 100644
--- a/hw/pci-host/pnv_phb.c
+++ b/hw/pci-host/pnv_phb.c
@@ -25,21 +25,19 @@
* QOM id. 'chip_id' is going to be used as PCIE chassis for the
* root port.
*/
-static void pnv_phb_attach_root_port(PCIHostState *pci, int index, int chip_id)
+static void pnv_phb_attach_root_port(PCIHostState *pci)
{
PCIDevice *root = pci_new(PCI_DEVFN(0, 0), TYPE_PNV_PHB_ROOT_PORT);
- g_autofree char *default_id = g_strdup_printf("%s[%d]",
- TYPE_PNV_PHB_ROOT_PORT,
- index);
const char *dev_id = DEVICE(root)->id;
+ g_autofree char *default_id = NULL;
+ int index;
+
+ index = object_property_get_int(OBJECT(pci->bus), "phb-id", &error_fatal);
+ default_id = g_strdup_printf("%s[%d]", TYPE_PNV_PHB_ROOT_PORT, index);
object_property_add_child(OBJECT(pci->bus), dev_id ? dev_id : default_id,
OBJECT(root));
- /* Set unique chassis/slot values for the root port */
- qdev_prop_set_uint8(DEVICE(root), "chassis", chip_id);
- qdev_prop_set_uint16(DEVICE(root), "slot", index);
-
pci_realize_and_unref(root, pci->bus, &error_fatal);
}
@@ -93,7 +91,7 @@ static void pnv_phb_realize(DeviceState *dev, Error **errp)
pnv_phb4_bus_init(dev, PNV_PHB4(phb->backend));
}
- pnv_phb_attach_root_port(pci, phb->phb_id, phb->chip_id);
+ pnv_phb_attach_root_port(pci);
}
static const char *pnv_phb_root_bus_path(PCIHostState *host_bridge,
@@ -162,9 +160,18 @@ static void pnv_phb_root_port_realize(DeviceState *dev, Error **errp)
{
PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev);
PnvPHBRootPort *phb_rp = PNV_PHB_ROOT_PORT(dev);
+ PCIBus *bus = PCI_BUS(qdev_get_parent_bus(dev));
PCIDevice *pci = PCI_DEVICE(dev);
uint16_t device_id = 0;
Error *local_err = NULL;
+ int chip_id, index;
+
+ chip_id = object_property_get_int(OBJECT(bus), "chip-id", &error_fatal);
+ index = object_property_get_int(OBJECT(bus), "phb-id", &error_fatal);
+
+ /* Set unique chassis/slot values for the root port */
+ qdev_prop_set_uint8(dev, "chassis", chip_id);
+ qdev_prop_set_uint16(dev, "slot", index);
rpc->parent_realize(dev, &local_err);
if (local_err) {
--
2.37.2
next prev parent reply other threads:[~2022-08-31 19:20 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-31 18:49 [PULL 00/60] ppc queue Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 01/60] pseries: Update SLOF firmware image Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 02/60] target/ppc: Fix host PVR matching for KVM Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 03/60] ppc/pnv: Add initial P9/10 SBE model Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 04/60] fpu: Add rebias bool, value and operation Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 05/60] target/ppc: Bugfix FP when OE/UE are set Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 06/60] ppc/pnv: add PHB3 bus init helper Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 07/60] ppc/pnv: add PnvPHB base/proxy device Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 08/60] ppc/pnv: turn PnvPHB3 into a PnvPHB backend Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 09/60] ppc/pnv: add PHB4 bus init helper Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 10/60] ppc/pnv: turn PnvPHB4 into a PnvPHB backend Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 11/60] ppc/pnv: add pnv-phb-root-port device Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 12/60] ppc/pnv: remove pnv-phb3-root-port Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 13/60] ppc/pnv: remove pnv-phb4-root-port Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 14/60] ppc/pnv: remove root port name from pnv_phb_attach_root_port() Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 15/60] ppc/pnv: remove pecc->rp_model Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 16/60] ppc/pnv: remove PnvPHB4.version Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 17/60] ppc/pnv: move attach_root_port helper to pnv-phb.c Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 18/60] ppc/pnv: add phb-id/chip-id PnvPHB3RootBus properties Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 19/60] ppc/pnv: add phb-id/chip-id PnvPHB4RootBus properties Daniel Henrique Barboza
2022-08-31 18:49 ` Daniel Henrique Barboza [this message]
2022-08-31 18:49 ` [PULL 21/60] ppc/pnv: add helpers for pnv-phb user devices Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 22/60] ppc/pnv: turn chip8->phbs[] into a PnvPHB* array Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 23/60] ppc/pnv: enable user created pnv-phb for powernv8 Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 24/60] ppc/pnv: add PHB4 helpers for user created pnv-phb Daniel Henrique Barboza
2022-08-31 18:49 ` [PULL 25/60] ppc/pnv: enable user created pnv-phb for powernv9 Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 26/60] ppc/pnv: change pnv_phb4_get_pec() to also retrieve chip10->pecs Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 27/60] ppc/pnv: user creatable pnv-phb for powernv10 Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 28/60] ppc/pnv: consolidate pnv_parent_*_fixup() helpers Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 29/60] ppc/pnv: fix QOM parenting of user creatable root ports Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 30/60] ppc/ppc405: Remove taihu machine Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 31/60] ppc/ppc405: Introduce a PPC405 generic machine Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 32/60] ppc/ppc405: Move devices under the ref405ep machine Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 33/60] ppc/ppc405: Move SRAM " Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 34/60] ppc/ppc405: Introduce a PPC405 SoC Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 35/60] ppc/ppc405: Start QOMification of the SoC Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 36/60] ppc/ppc405: QOM'ify CPU Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 37/60] ppc/ppc4xx: Introduce a DCR device model Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 38/60] ppc/ppc405: QOM'ify CPC Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 39/60] ppc/ppc405: QOM'ify GPT Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 40/60] ppc/ppc405: QOM'ify OCM Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 41/60] ppc/ppc405: QOM'ify GPIO Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 42/60] ppc/ppc405: QOM'ify DMA Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 43/60] ppc/ppc405: QOM'ify EBC Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 44/60] ppc/ppc405: QOM'ify OPBA Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 45/60] ppc/ppc405: QOM'ify POB Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 46/60] ppc/ppc405: QOM'ify PLB Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 47/60] ppc/ppc405: QOM'ify MAL Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 48/60] ppc4xx: Move PLB model to ppc4xx_devs.c Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 49/60] ppc4xx: Rename ppc405-plb to ppc4xx-plb Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 50/60] ppc4xx: Move EBC model to ppc4xx_devs.c Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 51/60] ppc4xx: Rename ppc405-ebc to ppc4xx-ebc Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 52/60] ppc/ppc405: Use an embedded PPCUIC model in SoC state Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 53/60] hw/intc/ppc-uic: Convert ppc-uic to a PPC4xx DCR device Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 54/60] ppc/ppc405: Use an explicit I2C object Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 55/60] ppc/ppc405: QOM'ify FPGA Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 56/60] ppc405: Move machine specific code to ppc405_boards.c Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 57/60] hw/ppc/sam3460ex: Remove PPC405 dependency from sam460ex Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 58/60] hw/ppc/Kconfig: Move imply before select Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 59/60] ppc/ppc4xx: Fix sdram trace events Daniel Henrique Barboza
2022-08-31 18:50 ` [PULL 60/60] ppc4xx: Fix code style problems reported by checkpatch Daniel Henrique Barboza
2022-08-31 19:37 ` [PULL 00/60] ppc queue BALATON Zoltan
2022-08-31 20:27 ` Daniel Henrique Barboza
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220831185034.23240-21-danielhb413@gmail.com \
--to=danielhb413@gmail.com \
--cc=clg@kaod.org \
--cc=fbarrat@linux.ibm.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).