From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Alistair Francis <alistair.francis@wdc.com>,
Ilya Leoshkevich <iii@linux.ibm.com>
Subject: [PULL 10/20] accel/tcg: Make tb_htable_lookup static
Date: Thu, 1 Sep 2022 07:52:00 +0100 [thread overview]
Message-ID: <20220901065210.117081-15-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220901065210.117081-1-richard.henderson@linaro.org>
The function is not used outside of cpu-exec.c. Move it and
its subroutines up in the file, before the first use.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/exec-all.h | 3 -
accel/tcg/cpu-exec.c | 122 ++++++++++++++++++++--------------------
2 files changed, 61 insertions(+), 64 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 0475ec6007..9f35e3b7a9 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -552,9 +552,6 @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs);
#endif
void tb_flush(CPUState *cpu);
void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
-TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
- target_ulong cs_base, uint32_t flags,
- uint32_t cflags);
void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr);
/* GETPC is the true target of the return instruction that we'll execute. */
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index d18081ca6f..7887af6f45 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -170,6 +170,67 @@ uint32_t curr_cflags(CPUState *cpu)
return cflags;
}
+struct tb_desc {
+ target_ulong pc;
+ target_ulong cs_base;
+ CPUArchState *env;
+ tb_page_addr_t phys_page1;
+ uint32_t flags;
+ uint32_t cflags;
+ uint32_t trace_vcpu_dstate;
+};
+
+static bool tb_lookup_cmp(const void *p, const void *d)
+{
+ const TranslationBlock *tb = p;
+ const struct tb_desc *desc = d;
+
+ if (tb->pc == desc->pc &&
+ tb->page_addr[0] == desc->phys_page1 &&
+ tb->cs_base == desc->cs_base &&
+ tb->flags == desc->flags &&
+ tb->trace_vcpu_dstate == desc->trace_vcpu_dstate &&
+ tb_cflags(tb) == desc->cflags) {
+ /* check next page if needed */
+ if (tb->page_addr[1] == -1) {
+ return true;
+ } else {
+ tb_page_addr_t phys_page2;
+ target_ulong virt_page2;
+
+ virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
+ phys_page2 = get_page_addr_code(desc->env, virt_page2);
+ if (tb->page_addr[1] == phys_page2) {
+ return true;
+ }
+ }
+ }
+ return false;
+}
+
+static TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
+ target_ulong cs_base, uint32_t flags,
+ uint32_t cflags)
+{
+ tb_page_addr_t phys_pc;
+ struct tb_desc desc;
+ uint32_t h;
+
+ desc.env = cpu->env_ptr;
+ desc.cs_base = cs_base;
+ desc.flags = flags;
+ desc.cflags = cflags;
+ desc.trace_vcpu_dstate = *cpu->trace_dstate;
+ desc.pc = pc;
+ phys_pc = get_page_addr_code(desc.env, pc);
+ if (phys_pc == -1) {
+ return NULL;
+ }
+ desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
+ h = tb_hash_func(phys_pc, pc, flags, cflags, *cpu->trace_dstate);
+ return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp);
+}
+
/* Might cause an exception, so have a longjmp destination ready */
static inline TranslationBlock *tb_lookup(CPUState *cpu, target_ulong pc,
target_ulong cs_base,
@@ -485,67 +546,6 @@ void cpu_exec_step_atomic(CPUState *cpu)
end_exclusive();
}
-struct tb_desc {
- target_ulong pc;
- target_ulong cs_base;
- CPUArchState *env;
- tb_page_addr_t phys_page1;
- uint32_t flags;
- uint32_t cflags;
- uint32_t trace_vcpu_dstate;
-};
-
-static bool tb_lookup_cmp(const void *p, const void *d)
-{
- const TranslationBlock *tb = p;
- const struct tb_desc *desc = d;
-
- if (tb->pc == desc->pc &&
- tb->page_addr[0] == desc->phys_page1 &&
- tb->cs_base == desc->cs_base &&
- tb->flags == desc->flags &&
- tb->trace_vcpu_dstate == desc->trace_vcpu_dstate &&
- tb_cflags(tb) == desc->cflags) {
- /* check next page if needed */
- if (tb->page_addr[1] == -1) {
- return true;
- } else {
- tb_page_addr_t phys_page2;
- target_ulong virt_page2;
-
- virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
- phys_page2 = get_page_addr_code(desc->env, virt_page2);
- if (tb->page_addr[1] == phys_page2) {
- return true;
- }
- }
- }
- return false;
-}
-
-TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
- target_ulong cs_base, uint32_t flags,
- uint32_t cflags)
-{
- tb_page_addr_t phys_pc;
- struct tb_desc desc;
- uint32_t h;
-
- desc.env = cpu->env_ptr;
- desc.cs_base = cs_base;
- desc.flags = flags;
- desc.cflags = cflags;
- desc.trace_vcpu_dstate = *cpu->trace_dstate;
- desc.pc = pc;
- phys_pc = get_page_addr_code(desc.env, pc);
- if (phys_pc == -1) {
- return NULL;
- }
- desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
- h = tb_hash_func(phys_pc, pc, flags, cflags, *cpu->trace_dstate);
- return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp);
-}
-
void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr)
{
if (TCG_TARGET_HAS_direct_jump) {
--
2.34.1
next prev parent reply other threads:[~2022-09-01 6:58 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-01 6:51 [PULL 00/20] tcg patch queue Richard Henderson
2022-09-01 6:51 ` [PULL 01/20] linux-user/arm: Mark the commpage executable Richard Henderson
2022-09-01 6:51 ` [PULL 1/4] target/avr: Support probe argument to tlb_fill Richard Henderson
2022-09-01 6:51 ` [PULL 02/20] linux-user/hppa: Allocate page zero as a commpage Richard Henderson
2022-09-01 6:51 ` [PULL 2/4] target/avr: Call avr_cpu_do_interrupt directly Richard Henderson
2022-09-01 6:51 ` [PULL 03/20] linux-user/x86_64: Allocate vsyscall page as a commpage Richard Henderson
2022-09-01 6:51 ` [PULL 3/4] target/avr: Only execute one interrupt at a time Richard Henderson
2022-09-01 6:51 ` [PULL 04/20] linux-user: Honor PT_GNU_STACK Richard Henderson
2022-09-01 6:51 ` [PULL 4/4] target/avr: Disable interrupts when env->skip set Richard Henderson
2022-09-01 6:51 ` [PULL 05/20] linux-user: Clear translations on mprotect() Richard Henderson
2022-09-01 6:51 ` [PULL 06/20] tests/tcg/i386: Move smc_code2 to an executable section Richard Henderson
2022-09-01 6:51 ` [PULL 07/20] accel/tcg: Introduce is_same_page() Richard Henderson
2022-09-01 6:51 ` [PULL 08/20] accel/tcg: Properly implement get_page_addr_code for user-only Richard Henderson
2022-09-01 6:51 ` [PULL 09/20] accel/tcg: Unlock mmap_lock after longjmp Richard Henderson
2022-09-01 6:52 ` Richard Henderson [this message]
2022-09-01 6:52 ` [PULL 11/20] accel/tcg: Move qemu_ram_addr_from_host_nofail to physmem.c Richard Henderson
2022-09-01 6:52 ` [PULL 12/20] accel/tcg: Use probe_access_internal for softmmu get_page_addr_code_hostp Richard Henderson
2022-09-01 6:52 ` [PULL 13/20] accel/tcg: Document the faulting lookup in tb_lookup_cmp Richard Henderson
2022-09-01 6:52 ` [PULL 14/20] accel/tcg: Remove translator_ldsw Richard Henderson
2022-09-01 6:52 ` [PULL 15/20] accel/tcg: Add pc and host_pc params to gen_intermediate_code Richard Henderson
2022-09-01 6:52 ` [PULL 16/20] accel/tcg: Add fast path for translator_ld* Richard Henderson
2022-09-01 6:52 ` [PULL 17/20] target/s390x: Make translator stop before the end of a page Richard Henderson
2022-09-01 6:52 ` [PULL 18/20] target/i386: " Richard Henderson
2022-09-01 6:52 ` [PULL 19/20] target/riscv: Add MAX_INSN_LEN and insn_len Richard Henderson
2022-09-01 6:52 ` [PULL 20/20] target/riscv: Make translator stop before the end of a page Richard Henderson
2022-09-01 21:28 ` [PULL 00/20] tcg patch queue Stefan Hajnoczi
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