From: Jay Khandkar <jaykhandkar2002@gmail.com>
To: qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, mst@redhat.com,
Jay Khandkar <jaykhandkar2002@gmail.com>
Subject: [PATCH V2] hw/intc: Handle software disabling of APIC correctly
Date: Wed, 7 Sep 2022 23:14:11 +0530 [thread overview]
Message-ID: <20220907174410.25180-1-jaykhandkar2002@gmail.com> (raw)
When the local APIC is in a software disabled state, all local interrupt
sources must be masked and all attempts to unmask them should be
ignored. Currently, we don't do either. Fix this by handling it
correctly in apic_mem_write().
Signed-off-by: Jay Khandkar <jaykhandkar2002@gmail.com>
---
hw/intc/apic.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index 3df11c34d6..be26b5c913 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -793,6 +793,11 @@ static void apic_mem_write(void *opaque, hwaddr addr, uint64_t val,
break;
case 0x0f:
s->spurious_vec = val & 0x1ff;
+ if (!(val & APIC_SPURIO_ENABLED)) {
+ for (int i = 0; i < APIC_LVT_NB; i++) {
+ s->lvt[i] |= APIC_LVT_MASKED;
+ }
+ }
apic_update_irq(s);
break;
case 0x10 ... 0x17:
@@ -812,6 +817,9 @@ static void apic_mem_write(void *opaque, hwaddr addr, uint64_t val,
case 0x32 ... 0x37:
{
int n = index - 0x32;
+ if (!(s->spurious_vec & APIC_SPURIO_ENABLED)) {
+ val |= APIC_LVT_MASKED;
+ }
s->lvt[n] = val;
if (n == APIC_LVT_TIMER) {
apic_timer_update(s, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
--
2.37.3
next reply other threads:[~2022-09-07 17:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-07 17:44 Jay Khandkar [this message]
2022-10-25 18:39 ` [PATCH V2] hw/intc: Handle software disabling of APIC correctly Jay Khandkar
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