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Tsirkin" To: Gerd Hoffmann Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Paolo Bonzini , Marcel Apfelbaum , Marcelo Tosatti , Richard Henderson , Sergio Lopez , Eduardo Habkost Subject: Re: [PATCH v2 2/2] [RfC] expose host-phys-bits to guest Message-ID: <20220908101757-mutt-send-email-mst@kernel.org> References: <20220908113109.470792-1-kraxel@redhat.com> <20220908113109.470792-3-kraxel@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220908113109.470792-3-kraxel@redhat.com> Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Thu, Sep 08, 2022 at 01:31:09PM +0200, Gerd Hoffmann wrote: > Move "host-phys-bits" property from cpu->host_phys_bits to > cpu->env.features[FEAT_KVM_HINTS] (KVM_HINTS_PHYS_ADDRESS_SIZE_DATA_VALID bit). > > This has the effect that the guest can see whenever host-phys-bits > is turned on or not and act accordingly. > > Signed-off-by: Gerd Hoffmann > --- > target/i386/cpu.h | 3 --- > hw/i386/microvm.c | 7 ++++++- > target/i386/cpu.c | 3 +-- > target/i386/host-cpu.c | 5 ++++- > target/i386/kvm/kvm.c | 1 + > 5 files changed, 12 insertions(+), 7 deletions(-) > > diff --git a/target/i386/cpu.h b/target/i386/cpu.h > index 82004b65b944..b9c6d3d9cac6 100644 > --- a/target/i386/cpu.h > +++ b/target/i386/cpu.h > @@ -1898,9 +1898,6 @@ struct ArchCPU { > /* if true fill the top bits of the MTRR_PHYSMASKn variable range */ > bool fill_mtrr_mask; > > - /* if true override the phys_bits value with a value read from the host */ > - bool host_phys_bits; > - > /* if set, limit maximum value for phys_bits when host_phys_bits is true */ > uint8_t host_phys_bits_limit; > > diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c > index 52cafa003d8a..316bbc8ef946 100644 > --- a/hw/i386/microvm.c > +++ b/hw/i386/microvm.c > @@ -54,6 +54,8 @@ > #include "kvm/kvm_i386.h" > #include "hw/xen/start_info.h" > > +#include "standard-headers/asm-x86/kvm_para.h" > + > #define MICROVM_QBOOT_FILENAME "qboot.rom" > #define MICROVM_BIOS_FILENAME "bios-microvm.bin" > > @@ -424,7 +426,10 @@ static void microvm_device_pre_plug_cb(HotplugHandler *hotplug_dev, > { > X86CPU *cpu = X86_CPU(dev); > > - cpu->host_phys_bits = true; /* need reliable phys-bits */ > + /* need reliable phys-bits */ > + cpu->env.features[FEAT_KVM_HINTS] |= > + (1 << KVM_HINTS_PHYS_ADDRESS_SIZE_DATA_VALID); > + Do we need compat machinery for this? > x86_cpu_pre_plug(hotplug_dev, dev, errp); > } > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index 1db1278a599b..d60f4498a3c3 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -778,7 +778,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { > [FEAT_KVM_HINTS] = { > .type = CPUID_FEATURE_WORD, > .feat_names = { > - "kvm-hint-dedicated", NULL, NULL, NULL, > + "kvm-hint-dedicated", "host-phys-bits", NULL, NULL, > NULL, NULL, NULL, NULL, > NULL, NULL, NULL, NULL, > NULL, NULL, NULL, NULL, > @@ -7016,7 +7016,6 @@ static Property x86_cpu_properties[] = { > DEFINE_PROP_BOOL("x-force-features", X86CPU, force_features, false), > DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true), > DEFINE_PROP_UINT32("phys-bits", X86CPU, phys_bits, 0), > - DEFINE_PROP_BOOL("host-phys-bits", X86CPU, host_phys_bits, false), > DEFINE_PROP_UINT8("host-phys-bits-limit", X86CPU, host_phys_bits_limit, 0), > DEFINE_PROP_BOOL("fill-mtrr-mask", X86CPU, fill_mtrr_mask, true), > DEFINE_PROP_UINT32("level-func7", X86CPU, env.cpuid_level_func7, > diff --git a/target/i386/host-cpu.c b/target/i386/host-cpu.c > index 10f8aba86e53..a1d6b3ac962e 100644 > --- a/target/i386/host-cpu.c > +++ b/target/i386/host-cpu.c > @@ -13,6 +13,8 @@ > #include "qapi/error.h" > #include "sysemu/sysemu.h" > > +#include "standard-headers/asm-x86/kvm_para.h" > + > /* Note: Only safe for use on x86(-64) hosts */ > static uint32_t host_cpu_phys_bits(void) > { > @@ -68,7 +70,8 @@ static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu) > warned = true; > } > > - if (cpu->host_phys_bits) { > + if (cpu->env.features[FEAT_KVM_HINTS] & > + (1 << KVM_HINTS_PHYS_ADDRESS_SIZE_DATA_VALID)) { > /* The user asked for us to use the host physical bits */ > phys_bits = host_phys_bits; > if (cpu->host_phys_bits_limit && I think we still want to key this one off host_phys_bits so it works for e.g. hyperv emulation too. > diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c > index a1fd1f53791d..3335c57b21b2 100644 > --- a/target/i386/kvm/kvm.c > +++ b/target/i386/kvm/kvm.c > @@ -459,6 +459,7 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, > } > } else if (function == KVM_CPUID_FEATURES && reg == R_EDX) { > ret |= 1U << KVM_HINTS_REALTIME; > + ret |= 1U << KVM_HINTS_PHYS_ADDRESS_SIZE_DATA_VALID; > } > > return ret; > -- > 2.37.3