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Tsirkin" To: Gerd Hoffmann Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Paolo Bonzini , Marcel Apfelbaum , Marcelo Tosatti , Richard Henderson , Sergio Lopez , Eduardo Habkost Subject: Re: [PATCH v2 2/2] [RfC] expose host-phys-bits to guest Message-ID: <20220909021213-mutt-send-email-mst@kernel.org> References: <20220908113109.470792-1-kraxel@redhat.com> <20220908113109.470792-3-kraxel@redhat.com> <20220908101757-mutt-send-email-mst@kernel.org> <20220909051817.vlai3l6cjl5sfgmv@sirius.home.kraxel.org> <20220909014106-mutt-send-email-mst@kernel.org> <20220909060653.s4cf7caaem3p7ac3@sirius.home.kraxel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220909060653.s4cf7caaem3p7ac3@sirius.home.kraxel.org> Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Fri, Sep 09, 2022 at 08:06:53AM +0200, Gerd Hoffmann wrote: > Hi, > > > > > I think we still want to key this one off host_phys_bits > > > > so it works for e.g. hyperv emulation too. > > > > > > I think that should be the case. The chunks above change the > > > host-phys-bits option from setting cpu->host_phys_bits to setting > > > the FEAT_KVM_HINTS bit. That should also happen with hyperv emulation > > > enabled, and the bit should also be visible to the guest then, just at > > > another location (base 0x40000100 instead of 0x40000000). > > > > > > take care, > > > Gerd > > > > > > You are right, I forgot. Hmm, ok. What about !cpu->expose_kvm ? > > > > We have > > > > if (!kvm_enabled() || !cpu->expose_kvm) { > > env->features[FEAT_KVM] = 0; > > } > > > > This is quick grep, I didn't check whether this is called > > after the point where you currently use it, but > > it frankly seems fragile to pass a generic user specified flag > > inside a cpuid where everyone pokes at it. > > I tried to avoid keeping the state of the host_phys_bits option at > multiple places. Maybe that wasn't a good idea after all. How about > doing this instead: > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index 1db1278a599b..279fde095d7c 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -6219,6 +6219,11 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp) > env->features[FEAT_KVM] = 0; > } > > + if (kvm_enabled() && cpu->host_phys_bits) { > + env->features[FEAT_KVM_HINTS] |= > + (1U << KVM_HINTS_PHYS_ADDRESS_SIZE_DATA_VALID); > + } > + > x86_cpu_enable_xsave_components(cpu); > > /* CPUID[EAX=7,ECX=0].EBX always increased level automatically: */ > diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c > index a1fd1f53791d..3335c57b21b2 100644 > --- a/target/i386/kvm/kvm.c > +++ b/target/i386/kvm/kvm.c > @@ -459,6 +459,7 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, > } > } else if (function == KVM_CPUID_FEATURES && reg == R_EDX) { > ret |= 1U << KVM_HINTS_REALTIME; > + ret |= 1U << KVM_HINTS_PHYS_ADDRESS_SIZE_DATA_VALID; > } > > return ret; /me nods. That seems much more straight-forward. -- MST