From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Peter Maydell <peter.maydell@linaro.org>
Subject: [PULL 05/20] target/arm: Implement ID_MMFR5
Date: Wed, 14 Sep 2022 12:52:02 +0100 [thread overview]
Message-ID: <20220914115217.117532-7-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220914115217.117532-1-richard.henderson@linaro.org>
From: Peter Maydell <peter.maydell@linaro.org>
In Armv8.6 a new AArch32 ID register ID_MMFR5 is defined.
Implement this; we want to be able to use it to report to
the guest that we implement FEAT_ETS.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220819110052.2942289-4-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.h | 1 +
target/arm/helper.c | 4 ++--
target/arm/kvm64.c | 2 ++
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 5168e3d837..fcc5927587 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -975,6 +975,7 @@ struct ArchCPU {
uint32_t id_mmfr2;
uint32_t id_mmfr3;
uint32_t id_mmfr4;
+ uint32_t id_mmfr5;
uint32_t id_pfr0;
uint32_t id_pfr1;
uint32_t id_pfr2;
diff --git a/target/arm/helper.c b/target/arm/helper.c
index c171770b03..0737851925 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -7586,11 +7586,11 @@ void register_cp_regs_for_features(ARMCPU *cpu)
.access = PL1_R, .type = ARM_CP_CONST,
.accessfn = access_aa64_tid3,
.resetvalue = 0 },
- { .name = "RES_0_C0_C3_6", .state = ARM_CP_STATE_BOTH,
+ { .name = "ID_MMFR5", .state = ARM_CP_STATE_BOTH,
.opc0 = 3, .opc1 = 0, .crn = 0, .crm = 3, .opc2 = 6,
.access = PL1_R, .type = ARM_CP_CONST,
.accessfn = access_aa64_tid3,
- .resetvalue = 0 },
+ .resetvalue = cpu->isar.id_mmfr5 },
{ .name = "RES_0_C0_C3_7", .state = ARM_CP_STATE_BOTH,
.opc0 = 3, .opc1 = 0, .crn = 0, .crm = 3, .opc2 = 7,
.access = PL1_R, .type = ARM_CP_CONST,
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index 84c4c85f40..2d737c443e 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -643,6 +643,8 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
ARM64_SYS_REG(3, 0, 0, 3, 2));
err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_pfr2,
ARM64_SYS_REG(3, 0, 0, 3, 4));
+ err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_mmfr5,
+ ARM64_SYS_REG(3, 0, 0, 3, 6));
/*
* DBGDIDR is a bit complicated because the kernel doesn't
--
2.34.1
next prev parent reply other threads:[~2022-09-14 12:56 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-14 11:51 [PULL 00/20] target-arm.next patch queue Richard Henderson
2022-09-14 11:51 ` [PULL 01/20] target/arm: Add cortex-a35 Richard Henderson
2022-09-14 11:51 ` [PATCH] target/arm: Do alignment check when translation disabled Richard Henderson
2022-09-22 15:31 ` Peter Maydell
2022-09-28 15:52 ` Richard Henderson
2022-09-14 11:51 ` [PULL 02/20] hw/arm/bcm2835_property: Add support for RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS Richard Henderson
2022-09-14 11:52 ` [PULL 03/20] target/arm: Make cpregs 0, c0, c{3-15}, {0-7} correctly RAZ in v8 Richard Henderson
2022-09-14 11:52 ` [PULL 04/20] target/arm: Sort KVM reads of AArch32 ID registers into encoding order Richard Henderson
2022-09-14 11:52 ` Richard Henderson [this message]
2022-09-14 11:52 ` [PULL 06/20] target/arm: Implement ID_DFR1 Richard Henderson
2022-09-14 11:52 ` [PULL 07/20] target/arm: Advertise FEAT_ETS for '-cpu max' Richard Henderson
2022-09-14 11:52 ` [PULL 08/20] target/arm: Add missing space in comment Richard Henderson
2022-09-14 11:52 ` [PULL 09/20] target/arm: Don't corrupt high half of PMOVSR when cycle counter overflows Richard Henderson
2022-09-14 11:52 ` [PULL 10/20] target/arm: Correct value returned by pmu_counter_mask() Richard Henderson
2022-09-14 11:52 ` [PULL 11/20] target/arm: Don't mishandle count when enabling or disabling PMU counters Richard Henderson
2022-09-20 16:45 ` Thomas Huth
2022-09-23 10:50 ` Peter Maydell
2022-09-14 11:52 ` [PULL 12/20] target/arm: Ignore PMCR.D when PMCR.LC is set Richard Henderson
2022-09-14 11:52 ` [PULL 13/20] target/arm: Honour MDCR_EL2.HPMD in Secure EL2 Richard Henderson
2022-09-14 11:52 ` [PULL 14/20] target/arm: Detect overflow when calculating next PMU interrupt Richard Henderson
2022-09-14 11:52 ` [PULL 15/20] target/arm: Rename pmu_8_n feature test functions Richard Henderson
2022-09-14 11:52 ` [PULL 16/20] target/arm: Implement FEAT_PMUv3p5 cycle counter disable bits Richard Henderson
2022-09-14 11:52 ` [PULL 17/20] target/arm: Support 64-bit event counters for FEAT_PMUv3p5 Richard Henderson
2022-09-14 11:52 ` [PULL 18/20] target/arm: Report FEAT_PMUv3p5 for TCG '-cpu max' Richard Henderson
2022-09-14 11:52 ` [PULL 19/20] target/arm: Remove useless TARGET_BIG_ENDIAN check in armv7m_load_kernel() Richard Henderson
2022-09-14 11:52 ` [PULL 20/20] target/arm: Make boards pass base address to armv7m_load_kernel() Richard Henderson
2022-09-17 20:13 ` [PULL 00/20] target-arm.next patch queue Stefan Hajnoczi
2022-09-20 13:06 ` Peter Maydell
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