qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Subject: [PULL 17/21] target/i386: fix INSERTQ implementation
Date: Mon, 19 Sep 2022 19:34:45 +0200	[thread overview]
Message-ID: <20220919173449.5864-18-pbonzini@redhat.com> (raw)
In-Reply-To: <20220919173449.5864-1-pbonzini@redhat.com>

INSERTQ is defined to not modify any bits in the lower 64 bits of the
destination, other than the ones being replaced with bits from the
source operand.  QEMU instead is using unshifted bits from the source
for those bits.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/ops_sse.h        | 10 +++++-----
 target/i386/ops_sse_header.h |  2 +-
 target/i386/tcg/translate.c  | 14 ++++++++++++--
 3 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 3504bca36a..7bf8bb967d 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -934,7 +934,7 @@ void helper_extrq_i(CPUX86State *env, ZMMReg *d, int index, int length)
     d->ZMM_Q(0) = helper_extrq(d->ZMM_Q(0), index, length);
 }
 
-static inline uint64_t helper_insertq(uint64_t src, int shift, int len)
+static inline uint64_t helper_insertq(uint64_t dest, uint64_t src, int shift, int len)
 {
     uint64_t mask;
 
@@ -943,17 +943,17 @@ static inline uint64_t helper_insertq(uint64_t src, int shift, int len)
     } else {
         mask = (1ULL << len) - 1;
     }
-    return (src & ~(mask << shift)) | ((src & mask) << shift);
+    return (dest & ~(mask << shift)) | ((src & mask) << shift);
 }
 
 void helper_insertq_r(CPUX86State *env, ZMMReg *d, ZMMReg *s)
 {
-    d->ZMM_Q(0) = helper_insertq(s->ZMM_Q(0), s->ZMM_B(9) & 63, s->ZMM_B(8) & 63);
+    d->ZMM_Q(0) = helper_insertq(d->ZMM_Q(0), s->ZMM_Q(0), s->ZMM_B(9) & 63, s->ZMM_B(8) & 63);
 }
 
-void helper_insertq_i(CPUX86State *env, ZMMReg *d, int index, int length)
+void helper_insertq_i(CPUX86State *env, ZMMReg *d, ZMMReg *s, int index, int length)
 {
-    d->ZMM_Q(0) = helper_insertq(d->ZMM_Q(0), index, length);
+    d->ZMM_Q(0) = helper_insertq(d->ZMM_Q(0), s->ZMM_Q(0), index, length);
 }
 #endif
 
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index d99464afb0..400b24c091 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -193,7 +193,7 @@ DEF_HELPER_3(rcpss, void, env, ZMMReg, ZMMReg)
 DEF_HELPER_3(extrq_r, void, env, ZMMReg, ZMMReg)
 DEF_HELPER_4(extrq_i, void, env, ZMMReg, int, int)
 DEF_HELPER_3(insertq_r, void, env, ZMMReg, ZMMReg)
-DEF_HELPER_4(insertq_i, void, env, ZMMReg, int, int)
+DEF_HELPER_5(insertq_i, void, env, ZMMReg, ZMMReg, int, int)
 DEF_HELPER_3(glue(haddps, SUFFIX), void, env, ZMMReg, ZMMReg)
 DEF_HELPER_3(glue(haddpd, SUFFIX), void, env, ZMMReg, ZMMReg)
 DEF_HELPER_3(glue(hsubps, SUFFIX), void, env, ZMMReg, ZMMReg)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 8ec91d17af..5f31a59fb8 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -3506,10 +3506,20 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
                     gen_helper_extrq_i(cpu_env, s->ptr0,
                                        tcg_const_i32(bit_index),
                                        tcg_const_i32(field_length));
-                else
-                    gen_helper_insertq_i(cpu_env, s->ptr0,
+                else {
+                    if (mod != 3) {
+                        gen_lea_modrm(env, s, modrm);
+                        op2_offset = offsetof(CPUX86State, xmm_t0);
+                        gen_ldq_env_A0(s, offsetof(CPUX86State, xmm_t0.ZMM_D(0)));
+                    } else {
+                        rm = (modrm & 7) | REX_B(s);
+                        op2_offset = ZMM_OFFSET(rm);
+                    }
+                    tcg_gen_addi_ptr(s->ptr1, cpu_env, op2_offset);
+                    gen_helper_insertq_i(cpu_env, s->ptr0, s->ptr1,
                                          tcg_const_i32(bit_index),
                                          tcg_const_i32(field_length));
+                }
             }
             break;
         case 0x7e: /* movd ea, mm */
-- 
2.37.2



  parent reply	other threads:[~2022-09-19 17:58 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-19 17:34 [PULL 00/21] Misc patches for 2022-09-19 Paolo Bonzini
2022-09-19 17:34 ` [PULL 01/21] KVM: use store-release to mark dirty pages as harvested Paolo Bonzini
2022-09-19 17:34 ` [PULL 02/21] target/i386: Raise #GP on unaligned m128 accesses when required Paolo Bonzini
2022-09-19 17:34 ` [PULL 03/21] kvm: fix memory leak on failure to read stats descriptors Paolo Bonzini
2022-09-19 17:34 ` [PULL 04/21] spapr_pci: fix leak in spapr_phb_vfio_get_loc_code Paolo Bonzini
2022-09-19 17:34 ` [PULL 05/21] coverity: add new RISC-V component Paolo Bonzini
2022-09-19 17:34 ` [PULL 06/21] coverity: put NUBus under m68k component Paolo Bonzini
2022-09-19 17:34 ` [PULL 07/21] smbios: sanitize type from external type before checking have_fields_bitmap Paolo Bonzini
2022-09-19 17:34 ` [PULL 08/21] tests: unit: simplify test-visitor-serialization list tests Paolo Bonzini
2022-09-19 17:34 ` [PULL 09/21] tests: test-qga: close socket on failure to connect Paolo Bonzini
2022-09-19 17:34 ` [PULL 10/21] tests: unit: add NULL-pointer check Paolo Bonzini
2022-09-19 17:34 ` [PULL 11/21] tests/tcg: i386: fix typos in 3DNow! instructions Paolo Bonzini
2022-09-19 17:34 ` [PULL 12/21] tests/tcg: i386: add MMX and 3DNow! tests Paolo Bonzini
2022-09-19 17:34 ` [PULL 13/21] tests/tcg: refine MMX support in SSE tests Paolo Bonzini
2022-09-19 17:34 ` [PULL 14/21] tests/tcg: remove old " Paolo Bonzini
2022-09-19 17:34 ` [PULL 15/21] audio: add help option for -audio and -audiodev Paolo Bonzini
2022-09-19 17:34 ` [PULL 16/21] target/i386: correctly mask SSE4a bit indices in register operands Paolo Bonzini
2022-09-19 17:34 ` Paolo Bonzini [this message]
2022-09-19 17:34 ` [PULL 18/21] target/i386: REPZ and REPNZ are mutually exclusive Paolo Bonzini
2022-09-19 17:34 ` [PULL 19/21] target/i386: introduce insn_get_addr Paolo Bonzini
2022-09-19 17:34 ` [PULL 20/21] build: remove extra parentheses causing missing rebuilds Paolo Bonzini
2022-09-19 17:34 ` [PULL 21/21] qboot: update to latest submodule Paolo Bonzini
2022-09-21 17:33 ` [PULL 00/21] Misc patches for 2022-09-19 Stefan Hajnoczi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220919173449.5864-18-pbonzini@redhat.com \
    --to=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).