From: Liav Albani <liavalb@gmail.com>
To: kraxel@redhat.com
Cc: qemu-devel@nongnu.org, Liav Albani <liavalb@gmail.com>
Subject: [PATCH 1/1] hw/display: expose linear framebuffer address in Bochs VBE registers
Date: Tue, 20 Sep 2022 18:49:22 +0300 [thread overview]
Message-ID: <20220920154922.248790-2-liavalb@gmail.com> (raw)
In-Reply-To: <20220920154922.248790-1-liavalb@gmail.com>
This is quite useful on the isa-vga device, because it lets guest drivers
to determine where is the framebuffer located in physical memory instead
of blindly hardcoding an address. It also allows future movements of the
framebuffer to other locations.
Signed-off-by: Liav Albani <liavalb@gmail.com>
---
hw/display/bochs-display.c | 10 +++++++++-
hw/display/vga.c | 13 +++++++++++--
include/hw/display/bochs-vbe.h | 7 ++++++-
3 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c
index 8ed734b195..aa3aa51e2f 100644
--- a/hw/display/bochs-display.c
+++ b/hw/display/bochs-display.c
@@ -77,9 +77,17 @@ static uint64_t bochs_display_vbe_read(void *ptr, hwaddr addr,
switch (index) {
case VBE_DISPI_INDEX_ID:
- return VBE_DISPI_ID5;
+ return VBE_DISPI_ID6;
case VBE_DISPI_INDEX_VIDEO_MEMORY_64K:
return s->vgamem / (64 * KiB);
+ case VBE_DISPI_VIDEO_MEMORY_PHYSICAL_ADDRESS1:
+ return (s->vram.addr) & 0xffff;
+ case VBE_DISPI_VIDEO_MEMORY_PHYSICAL_ADDRESS2:
+ return (s->vram.addr >> 16) & 0xffff;
+ case VBE_DISPI_VIDEO_MEMORY_PHYSICAL_ADDRESS3:
+ return (s->vram.addr >> 32) & 0xffff;
+ case VBE_DISPI_VIDEO_MEMORY_PHYSICAL_ADDRESS4:
+ return (s->vram.addr >> 48) & 0xffff;
}
if (index >= ARRAY_SIZE(s->vbe_regs)) {
diff --git a/hw/display/vga.c b/hw/display/vga.c
index 50ecb1ad02..9d91946987 100644
--- a/hw/display/vga.c
+++ b/hw/display/vga.c
@@ -727,6 +727,14 @@ uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr)
}
} else if (s->vbe_index == VBE_DISPI_INDEX_VIDEO_MEMORY_64K) {
val = s->vbe_size / (64 * KiB);
+ } else if (s->vbe_index == VBE_DISPI_VIDEO_MEMORY_PHYSICAL_ADDRESS1) {
+ val = (s->vram.addr) & 0xffff;
+ } else if (s->vbe_index == VBE_DISPI_VIDEO_MEMORY_PHYSICAL_ADDRESS2) {
+ val = (s->vram.addr >> 16) & 0xffff;
+ } else if (s->vbe_index == VBE_DISPI_VIDEO_MEMORY_PHYSICAL_ADDRESS3) {
+ val = (s->vram.addr >> 32) & 0xffff;
+ } else if (s->vbe_index == VBE_DISPI_VIDEO_MEMORY_PHYSICAL_ADDRESS4) {
+ val = (s->vram.addr >> 48) & 0xffff;
} else {
val = 0;
}
@@ -753,7 +761,8 @@ void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val)
val == VBE_DISPI_ID2 ||
val == VBE_DISPI_ID3 ||
val == VBE_DISPI_ID4 ||
- val == VBE_DISPI_ID5) {
+ val == VBE_DISPI_ID5 ||
+ val == VBE_DISPI_ID6) {
s->vbe_regs[s->vbe_index] = val;
}
break;
@@ -1830,7 +1839,7 @@ void vga_common_reset(VGACommonState *s)
s->bank_offset = 0;
s->vbe_index = 0;
memset(s->vbe_regs, '\0', sizeof(s->vbe_regs));
- s->vbe_regs[VBE_DISPI_INDEX_ID] = VBE_DISPI_ID5;
+ s->vbe_regs[VBE_DISPI_INDEX_ID] = VBE_DISPI_ID6;
s->vbe_start_addr = 0;
s->vbe_line_offset = 0;
s->vbe_bank_mask = (s->vram_size >> 16) - 1;
diff --git a/include/hw/display/bochs-vbe.h b/include/hw/display/bochs-vbe.h
index bc2f046eee..383474b9d1 100644
--- a/include/hw/display/bochs-vbe.h
+++ b/include/hw/display/bochs-vbe.h
@@ -19,8 +19,12 @@
#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
#define VBE_DISPI_INDEX_X_OFFSET 0x8
#define VBE_DISPI_INDEX_Y_OFFSET 0x9
-#define VBE_DISPI_INDEX_NB 0xa /* size of vbe_regs[] */
#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa /* read-only, not in vbe_regs */
+#define VBE_DISPI_VIDEO_MEMORY_PHYSICAL_ADDRESS1 0xb /* read-only, not in vbe_regs */
+#define VBE_DISPI_VIDEO_MEMORY_PHYSICAL_ADDRESS2 0xc /* read-only, not in vbe_regs */
+#define VBE_DISPI_VIDEO_MEMORY_PHYSICAL_ADDRESS3 0xd /* read-only, not in vbe_regs */
+#define VBE_DISPI_VIDEO_MEMORY_PHYSICAL_ADDRESS4 0xe /* read-only, not in vbe_regs */
+#define VBE_DISPI_INDEX_NB 0xe /* size of vbe_regs[] */
/* VBE_DISPI_INDEX_ID */
#define VBE_DISPI_ID0 0xB0C0
@@ -29,6 +33,7 @@
#define VBE_DISPI_ID3 0xB0C3
#define VBE_DISPI_ID4 0xB0C4
#define VBE_DISPI_ID5 0xB0C5
+#define VBE_DISPI_ID6 0xB0C6
/* VBE_DISPI_INDEX_ENABLE */
#define VBE_DISPI_DISABLED 0x00
--
2.37.3
next prev parent reply other threads:[~2022-09-20 20:49 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-20 15:49 [PATCH 0/1] hw/display: expose linear framebuffer address in Bochs VBE registers Liav Albani
2022-09-20 15:49 ` Liav Albani [this message]
2022-09-21 6:14 ` Gerd Hoffmann
2022-09-21 18:17 ` Liav Albani
2022-09-22 5:13 ` Gerd Hoffmann
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