From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-stable@nongnu.org, qemu-riscv@nongnu.org,
"Alistair Francis" <Alistair.Francis@wdc.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Bin Meng" <bin.meng@windriver.com>,
"Bernhard Beschow" <shentey@gmail.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH] hw/riscv/sifive_e: Fix inheritance of SiFiveEState
Date: Thu, 22 Sep 2022 09:52:32 +0200 [thread overview]
Message-ID: <20220922075232.33653-1-shentey@gmail.com> (raw)
SiFiveEState inherits from SysBusDevice while it's TypeInfo claims it to
inherit from TYPE_MACHINE. This is an inconsistency which can cause
undefined behavior such as memory corruption.
Change SiFiveEState to inherit from MachineState since it is registered
as a machine.
Fixes: 0869490b1c ("riscv: sifive_e: Manually define the machine")
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/riscv/sifive_e.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
index 83604da805..d738745925 100644
--- a/include/hw/riscv/sifive_e.h
+++ b/include/hw/riscv/sifive_e.h
@@ -22,6 +22,7 @@
#include "hw/riscv/riscv_hart.h"
#include "hw/riscv/sifive_cpu.h"
#include "hw/gpio/sifive_gpio.h"
+#include "hw/boards.h"
#define TYPE_RISCV_E_SOC "riscv.sifive.e.soc"
#define RISCV_E_SOC(obj) \
@@ -41,7 +42,7 @@ typedef struct SiFiveESoCState {
typedef struct SiFiveEState {
/*< private >*/
- SysBusDevice parent_obj;
+ MachineState parent_obj;
/*< public >*/
SiFiveESoCState soc;
--
2.37.3
next reply other threads:[~2022-09-22 7:56 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-22 7:52 Bernhard Beschow [this message]
2022-09-22 7:58 ` [PATCH] hw/riscv/sifive_e: Fix inheritance of SiFiveEState Frank Chang
2022-09-23 3:59 ` Alistair Francis
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