From: Laurent Vivier <laurent@vivier.eu>
To: qemu-devel@nongnu.org
Cc: Laurent Vivier <laurent@vivier.eu>,
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
Richard Henderson <richard.henderson@linaro.org>
Subject: [PULL 2/3] target/m68k: use M68K_FEATURE_MOVEFROMSR_PRIV feature for move_from_sr privilege check
Date: Tue, 27 Sep 2022 08:26:32 +0200 [thread overview]
Message-ID: <20220927062633.618677-3-laurent@vivier.eu> (raw)
In-Reply-To: <20220927062633.618677-1-laurent@vivier.eu>
From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Now that M68K_FEATURE_M68000 has been renamed to M68K_FEATURE_M68K it is easier
to see that the privilege exception check is wrong: it is currently only generated
for ColdFire CPUs when in fact it should also be generated for Motorola CPUs from
the 68010 onwards.
Introduce a new M68K_FEATURE_MOVEFROMSR_PRIV feature which is set for all non-
Motorola CPUs, and for all Motorola CPUs from the 68010 onwards and use it to
determine whether a privilege exception should be generated for the MOVE-from-SR
instruction.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220925134804.139706-3-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/cpu.h | 2 ++
target/m68k/cpu.c | 5 +++++
target/m68k/translate.c | 2 +-
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index f5c6e95cb44a..3a9cfe2f33a7 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -537,6 +537,8 @@ enum m68k_features {
M68K_FEATURE_UNALIGNED_DATA,
/* TRAPcc insn. (680[2346]0, and CPU32) */
M68K_FEATURE_TRAPCC,
+ /* MOVE from SR privileged (from 68010) */
+ M68K_FEATURE_MOVEFROMSR_PRIV,
};
static inline bool m68k_feature(CPUM68KState *env, int feature)
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 8d23c72056fd..25d610db21f7 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -102,6 +102,7 @@ static void m5206_cpu_initfn(Object *obj)
CPUM68KState *env = &cpu->env;
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
+ m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
}
/* Base feature set, including isns. for m68k family */
@@ -129,6 +130,7 @@ static void m68010_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_RTD);
m68k_set_feature(env, M68K_FEATURE_BKPT);
m68k_set_feature(env, M68K_FEATURE_MOVEC);
+ m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
}
/*
@@ -241,6 +243,7 @@ static void m5208_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_BRAL);
m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
m68k_set_feature(env, M68K_FEATURE_USP);
+ m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
}
static void cfv4e_cpu_initfn(Object *obj)
@@ -254,6 +257,7 @@ static void cfv4e_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_CF_FPU);
m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
m68k_set_feature(env, M68K_FEATURE_USP);
+ m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
}
static void any_cpu_initfn(Object *obj)
@@ -275,6 +279,7 @@ static void any_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_USP);
m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
+ m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
}
static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 233b9d8e5783..9df17aa4b2d8 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4624,7 +4624,7 @@ DISAS_INSN(move_from_sr)
{
TCGv sr;
- if (IS_USER(s) && !m68k_feature(env, M68K_FEATURE_M68K)) {
+ if (IS_USER(s) && m68k_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV)) {
gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE);
return;
}
--
2.37.3
next prev parent reply other threads:[~2022-09-27 7:10 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-27 6:26 [PULL 0/3] M68k for 7.2 patches Laurent Vivier
2022-09-27 6:26 ` [PULL 1/3] target/m68k: increase size of m68k CPU features from uint32_t to uint64_t Laurent Vivier
2022-09-27 6:26 ` Laurent Vivier [this message]
2022-09-27 6:26 ` [PULL 3/3] m68k: align bootinfo strings and data to 4 bytes Laurent Vivier
2022-09-27 18:40 ` [PULL 0/3] M68k for 7.2 patches Stefan Hajnoczi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220927062633.618677-3-laurent@vivier.eu \
--to=laurent@vivier.eu \
--cc=mark.cave-ayland@ilande.co.uk \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).