From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: pbonzini@redhat.com
Subject: [PATCH v3 09/26] target/i386: Use DISAS_EOB_NEXT
Date: Sat, 1 Oct 2022 07:09:18 -0700 [thread overview]
Message-ID: <20221001140935.465607-10-richard.henderson@linaro.org> (raw)
In-Reply-To: <20221001140935.465607-1-richard.henderson@linaro.org>
Replace sequences of gen_update_cc_op, gen_update_eip_next,
and gen_eob with the new is_jmp enumerator.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/i386/tcg/translate.c | 40 ++++++++++++-------------------------
1 file changed, 13 insertions(+), 27 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 8c0ef0f212..717c978381 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -7022,8 +7022,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
gen_pop_update(s, ot);
set_cc_op(s, CC_OP_EFLAGS);
/* abort translation because TF/AC flag may change */
- gen_update_eip_next(s);
- gen_eob(s);
+ s->base.is_jmp = DISAS_EOB_NEXT;
}
break;
case 0x9e: /* sahf */
@@ -7452,8 +7451,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
gen_helper_rdmsr(cpu_env);
} else {
gen_helper_wrmsr(cpu_env);
- gen_update_eip_next(s);
- gen_eob(s);
+ s->base.is_jmp = DISAS_EOB_NEXT;
}
}
break;
@@ -7652,8 +7650,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
goto illegal_op;
}
gen_helper_clac(cpu_env);
- gen_update_eip_next(s);
- gen_eob(s);
+ s->base.is_jmp = DISAS_EOB_NEXT;
break;
case 0xcb: /* stac */
@@ -7662,8 +7659,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
goto illegal_op;
}
gen_helper_stac(cpu_env);
- gen_update_eip_next(s);
- gen_eob(s);
+ s->base.is_jmp = DISAS_EOB_NEXT;
break;
CASE_MODRM_MEM_OP(1): /* sidt */
@@ -7707,8 +7703,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
tcg_gen_trunc_tl_i32(s->tmp2_i32, cpu_regs[R_ECX]);
gen_helper_xsetbv(cpu_env, s->tmp2_i32, s->tmp1_i64);
/* End TB because translation flags may change. */
- gen_update_eip_next(s);
- gen_eob(s);
+ s->base.is_jmp = DISAS_EOB_NEXT;
break;
case 0xd8: /* VMRUN */
@@ -7769,8 +7764,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
}
gen_update_cc_op(s);
gen_helper_stgi(cpu_env);
- gen_update_eip_next(s);
- gen_eob(s);
+ s->base.is_jmp = DISAS_EOB_NEXT;
break;
case 0xdd: /* CLGI */
@@ -7808,8 +7802,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
tcg_gen_ext32u_tl(s->A0, cpu_regs[R_EAX]);
}
gen_helper_flush_page(cpu_env, s->A0);
- gen_update_eip_next(s);
- gen_eob(s);
+ s->base.is_jmp = DISAS_EOB_NEXT;
break;
CASE_MODRM_MEM_OP(2): /* lgdt */
@@ -7892,8 +7885,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
tcg_gen_andi_tl(s->T1, s->T1, ~0xe);
tcg_gen_or_tl(s->T0, s->T0, s->T1);
gen_helper_write_crN(cpu_env, tcg_constant_i32(0), s->T0);
- gen_update_eip_next(s);
- gen_eob(s);
+ s->base.is_jmp = DISAS_EOB_NEXT;
break;
CASE_MODRM_MEM_OP(7): /* invlpg */
@@ -7903,8 +7895,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
gen_svm_check_intercept(s, SVM_EXIT_INVLPG);
gen_lea_modrm(env, s, modrm);
gen_helper_flush_page(cpu_env, s->A0);
- gen_update_eip_next(s);
- gen_eob(s);
+ s->base.is_jmp = DISAS_EOB_NEXT;
break;
case 0xf8: /* swapgs */
@@ -8303,8 +8294,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
gen_svm_check_intercept(s, SVM_EXIT_WRITE_CR0 + reg);
gen_op_mov_v_reg(s, ot, s->T0, rm);
gen_helper_write_crN(cpu_env, tcg_constant_i32(reg), s->T0);
- gen_update_eip_next(s);
- gen_eob(s);
+ s->base.is_jmp = DISAS_EOB_NEXT;
} else {
gen_svm_check_intercept(s, SVM_EXIT_READ_CR0 + reg);
gen_helper_read_crN(s->T0, cpu_env, tcg_constant_i32(reg));
@@ -8338,8 +8328,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
gen_op_mov_v_reg(s, ot, s->T0, rm);
tcg_gen_movi_i32(s->tmp2_i32, reg);
gen_helper_set_dr(cpu_env, s->tmp2_i32, s->T0);
- gen_update_eip_next(s);
- gen_eob(s);
+ s->base.is_jmp = DISAS_EOB_NEXT;
} else {
gen_svm_check_intercept(s, SVM_EXIT_READ_DR0 + reg);
tcg_gen_movi_i32(s->tmp2_i32, reg);
@@ -8353,8 +8342,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
gen_svm_check_intercept(s, SVM_EXIT_WRITE_CR0);
gen_helper_clts(cpu_env);
/* abort block because static cpu state changed */
- gen_update_eip_next(s);
- gen_eob(s);
+ s->base.is_jmp = DISAS_EOB_NEXT;
}
break;
/* MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4 support */
@@ -8450,9 +8438,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
gen_helper_xrstor(cpu_env, s->A0, s->tmp1_i64);
/* XRSTOR is how MPX is enabled, which changes how
we translate. Thus we need to end the TB. */
- gen_update_cc_op(s);
- gen_update_eip_next(s);
- gen_eob(s);
+ s->base.is_jmp = DISAS_EOB_NEXT;
break;
CASE_MODRM_MEM_OP(6): /* xsaveopt / clwb */
--
2.34.1
next prev parent reply other threads:[~2022-10-01 14:14 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-01 14:09 [PATCH v3 00/26] target/i386: pc-relative translation blocks Richard Henderson
2022-10-01 14:09 ` [PATCH v3 01/26] target/i386: Remove pc_start Richard Henderson
2022-10-01 14:09 ` [PATCH v3 02/26] target/i386: Return bool from disas_insn Richard Henderson
2022-10-01 14:09 ` [PATCH v3 03/26] target/i386: Remove cur_eip argument to gen_exception Richard Henderson
2022-10-01 14:09 ` [PATCH v3 04/26] target/i386: Remove cur_eip, next_eip arguments to gen_interrupt Richard Henderson
2022-10-01 14:09 ` [PATCH v3 05/26] target/i386: Create gen_update_eip_cur Richard Henderson
2022-10-01 14:09 ` [PATCH v3 06/26] target/i386: Create gen_update_eip_next Richard Henderson
2022-10-01 14:09 ` [PATCH v3 07/26] target/i386: Introduce DISAS_EOB* Richard Henderson
2022-10-01 14:09 ` [PATCH v3 08/26] target/i386: Use DISAS_EOB* in gen_movl_seg_T0 Richard Henderson
2022-10-01 14:09 ` Richard Henderson [this message]
2022-10-01 14:09 ` [PATCH v3 10/26] target/i386: USe DISAS_EOB_ONLY Richard Henderson
2022-10-01 14:09 ` [PATCH v3 11/26] target/i386: Create cur_insn_len, cur_insn_len_i32 Richard Henderson
2022-10-01 14:09 ` [PATCH v3 12/26] target/i386: Remove cur_eip, next_eip arguments to gen_repz* Richard Henderson
2022-10-01 14:09 ` [PATCH v3 13/26] target/i386: Introduce DISAS_JUMP Richard Henderson
2022-10-01 14:09 ` [PATCH v3 14/26] target/i386: Truncate values for lcall_real to i32 Richard Henderson
2022-10-01 14:09 ` [PATCH v3 15/26] target/i386: Create eip_next_* Richard Henderson
2022-10-01 14:09 ` [PATCH v3 16/26] target/i386: Use DISAS_TOO_MANY to exit after gen_io_start Richard Henderson
2022-10-01 14:09 ` [PATCH v3 17/26] target/i386: Create gen_jmp_rel Richard Henderson
2022-10-01 14:09 ` [PATCH v3 18/26] target/i386: Use gen_jmp_rel for loop, repz, jecxz insns Richard Henderson
2022-10-01 14:09 ` [PATCH v3 19/26] target/i386: Use gen_jmp_rel for gen_jcc Richard Henderson
2022-10-01 14:09 ` [PATCH v3 20/26] target/i386: Use gen_jmp_rel for DISAS_TOO_MANY Richard Henderson
2022-10-01 14:09 ` [PATCH v3 21/26] target/i386: Remove MemOp argument to gen_op_j*_ecx Richard Henderson
2022-10-01 14:09 ` [PATCH v3 22/26] target/i386: Merge gen_jmp_tb and gen_goto_tb into gen_jmp_rel Richard Henderson
2022-10-01 14:09 ` [PATCH v3 23/26] target/i386: Create eip_cur_tl Richard Henderson
2022-10-01 14:09 ` [PATCH v3 24/26] target/i386: Add cpu_eip Richard Henderson
2022-10-01 14:09 ` [PATCH v3 25/26] target/i386: Inline gen_jmp_im Richard Henderson
2022-10-01 14:09 ` [PATCH v3 26/26] target/i386: Enable TARGET_TB_PCREL Richard Henderson
2022-10-01 20:59 ` [PATCH v3 00/26] target/i386: pc-relative translation blocks Paolo Bonzini
2022-10-05 20:26 ` Richard Henderson
2022-10-05 21:06 ` Paolo Bonzini
2022-10-05 21:31 ` Richard Henderson
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