From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH v3 03/26] target/i386: Remove cur_eip argument to gen_exception
Date: Sat, 1 Oct 2022 07:09:12 -0700 [thread overview]
Message-ID: <20221001140935.465607-4-richard.henderson@linaro.org> (raw)
In-Reply-To: <20221001140935.465607-1-richard.henderson@linaro.org>
All callers pass s->base.pc_next - s->cs_base, which we can just
as well compute within the function. Note the special case of
EXCP_VSYSCALL in which s->cs_base wasn't subtracted, but cs_base
is always zero in 64-bit mode, when vsyscall is used.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/i386/tcg/translate.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 3f3e79c096..617832fcb0 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -1332,10 +1332,10 @@ static void gen_helper_fp_arith_STN_ST0(int op, int opreg)
}
}
-static void gen_exception(DisasContext *s, int trapno, target_ulong cur_eip)
+static void gen_exception(DisasContext *s, int trapno)
{
gen_update_cc_op(s);
- gen_jmp_im(s, cur_eip);
+ gen_jmp_im(s, s->base.pc_next - s->cs_base);
gen_helper_raise_exception(cpu_env, tcg_const_i32(trapno));
s->base.is_jmp = DISAS_NORETURN;
}
@@ -1344,13 +1344,13 @@ static void gen_exception(DisasContext *s, int trapno, target_ulong cur_eip)
the instruction is known, but it isn't allowed in the current cpu mode. */
static void gen_illegal_opcode(DisasContext *s)
{
- gen_exception(s, EXCP06_ILLOP, s->base.pc_next - s->cs_base);
+ gen_exception(s, EXCP06_ILLOP);
}
/* Generate #GP for the current instruction. */
static void gen_exception_gpf(DisasContext *s)
{
- gen_exception(s, EXCP0D_GPF, s->base.pc_next - s->cs_base);
+ gen_exception(s, EXCP0D_GPF);
}
/* Check for cpl == 0; if not, raise #GP and return false. */
@@ -3267,7 +3267,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
}
/* simple MMX/SSE operation */
if (s->flags & HF_TS_MASK) {
- gen_exception(s, EXCP07_PREX, s->base.pc_next - s->cs_base);
+ gen_exception(s, EXCP07_PREX);
return;
}
if (s->flags & HF_EM_MASK) {
@@ -6077,7 +6077,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
if (s->flags & (HF_EM_MASK | HF_TS_MASK)) {
/* if CR0.EM or CR0.TS are set, generate an FPU exception */
/* XXX: what to do if illegal op ? */
- gen_exception(s, EXCP07_PREX, s->base.pc_next - s->cs_base);
+ gen_exception(s, EXCP07_PREX);
break;
}
modrm = x86_ldub_code(env, s);
@@ -7302,7 +7302,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
goto illegal_op;
val = x86_ldub_code(env, s);
if (val == 0) {
- gen_exception(s, EXCP00_DIVZ, s->base.pc_next - s->cs_base);
+ gen_exception(s, EXCP00_DIVZ);
} else {
gen_helper_aam(cpu_env, tcg_const_i32(val));
set_cc_op(s, CC_OP_LOGICB);
@@ -7336,7 +7336,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
case 0x9b: /* fwait */
if ((s->flags & (HF_MP_MASK | HF_TS_MASK)) ==
(HF_MP_MASK | HF_TS_MASK)) {
- gen_exception(s, EXCP07_PREX, s->base.pc_next - s->cs_base);
+ gen_exception(s, EXCP07_PREX);
} else {
gen_helper_fwait(cpu_env);
}
@@ -8393,7 +8393,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
goto illegal_op;
}
if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
- gen_exception(s, EXCP07_PREX, s->base.pc_next - s->cs_base);
+ gen_exception(s, EXCP07_PREX);
break;
}
gen_lea_modrm(env, s, modrm);
@@ -8406,7 +8406,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
goto illegal_op;
}
if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
- gen_exception(s, EXCP07_PREX, s->base.pc_next - s->cs_base);
+ gen_exception(s, EXCP07_PREX);
break;
}
gen_lea_modrm(env, s, modrm);
@@ -8418,7 +8418,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
goto illegal_op;
}
if (s->flags & HF_TS_MASK) {
- gen_exception(s, EXCP07_PREX, s->base.pc_next - s->cs_base);
+ gen_exception(s, EXCP07_PREX);
break;
}
gen_lea_modrm(env, s, modrm);
@@ -8431,7 +8431,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
goto illegal_op;
}
if (s->flags & HF_TS_MASK) {
- gen_exception(s, EXCP07_PREX, s->base.pc_next - s->cs_base);
+ gen_exception(s, EXCP07_PREX);
break;
}
gen_helper_update_mxcsr(cpu_env);
@@ -8822,7 +8822,7 @@ static void i386_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
* Detect entry into the vsyscall page and invoke the syscall.
*/
if ((dc->base.pc_next & TARGET_PAGE_MASK) == TARGET_VSYSCALL_PAGE) {
- gen_exception(dc, EXCP_VSYSCALL, dc->base.pc_next);
+ gen_exception(dc, EXCP_VSYSCALL);
dc->base.pc_next = dc->pc + 1;
return;
}
--
2.34.1
next prev parent reply other threads:[~2022-10-01 14:28 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-01 14:09 [PATCH v3 00/26] target/i386: pc-relative translation blocks Richard Henderson
2022-10-01 14:09 ` [PATCH v3 01/26] target/i386: Remove pc_start Richard Henderson
2022-10-01 14:09 ` [PATCH v3 02/26] target/i386: Return bool from disas_insn Richard Henderson
2022-10-01 14:09 ` Richard Henderson [this message]
2022-10-01 14:09 ` [PATCH v3 04/26] target/i386: Remove cur_eip, next_eip arguments to gen_interrupt Richard Henderson
2022-10-01 14:09 ` [PATCH v3 05/26] target/i386: Create gen_update_eip_cur Richard Henderson
2022-10-01 14:09 ` [PATCH v3 06/26] target/i386: Create gen_update_eip_next Richard Henderson
2022-10-01 14:09 ` [PATCH v3 07/26] target/i386: Introduce DISAS_EOB* Richard Henderson
2022-10-01 14:09 ` [PATCH v3 08/26] target/i386: Use DISAS_EOB* in gen_movl_seg_T0 Richard Henderson
2022-10-01 14:09 ` [PATCH v3 09/26] target/i386: Use DISAS_EOB_NEXT Richard Henderson
2022-10-01 14:09 ` [PATCH v3 10/26] target/i386: USe DISAS_EOB_ONLY Richard Henderson
2022-10-01 14:09 ` [PATCH v3 11/26] target/i386: Create cur_insn_len, cur_insn_len_i32 Richard Henderson
2022-10-01 14:09 ` [PATCH v3 12/26] target/i386: Remove cur_eip, next_eip arguments to gen_repz* Richard Henderson
2022-10-01 14:09 ` [PATCH v3 13/26] target/i386: Introduce DISAS_JUMP Richard Henderson
2022-10-01 14:09 ` [PATCH v3 14/26] target/i386: Truncate values for lcall_real to i32 Richard Henderson
2022-10-01 14:09 ` [PATCH v3 15/26] target/i386: Create eip_next_* Richard Henderson
2022-10-01 14:09 ` [PATCH v3 16/26] target/i386: Use DISAS_TOO_MANY to exit after gen_io_start Richard Henderson
2022-10-01 14:09 ` [PATCH v3 17/26] target/i386: Create gen_jmp_rel Richard Henderson
2022-10-01 14:09 ` [PATCH v3 18/26] target/i386: Use gen_jmp_rel for loop, repz, jecxz insns Richard Henderson
2022-10-01 14:09 ` [PATCH v3 19/26] target/i386: Use gen_jmp_rel for gen_jcc Richard Henderson
2022-10-01 14:09 ` [PATCH v3 20/26] target/i386: Use gen_jmp_rel for DISAS_TOO_MANY Richard Henderson
2022-10-01 14:09 ` [PATCH v3 21/26] target/i386: Remove MemOp argument to gen_op_j*_ecx Richard Henderson
2022-10-01 14:09 ` [PATCH v3 22/26] target/i386: Merge gen_jmp_tb and gen_goto_tb into gen_jmp_rel Richard Henderson
2022-10-01 14:09 ` [PATCH v3 23/26] target/i386: Create eip_cur_tl Richard Henderson
2022-10-01 14:09 ` [PATCH v3 24/26] target/i386: Add cpu_eip Richard Henderson
2022-10-01 14:09 ` [PATCH v3 25/26] target/i386: Inline gen_jmp_im Richard Henderson
2022-10-01 14:09 ` [PATCH v3 26/26] target/i386: Enable TARGET_TB_PCREL Richard Henderson
2022-10-01 20:59 ` [PATCH v3 00/26] target/i386: pc-relative translation blocks Paolo Bonzini
2022-10-05 20:26 ` Richard Henderson
2022-10-05 21:06 ` Paolo Bonzini
2022-10-05 21:31 ` Richard Henderson
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