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From: Patrick Williams <patrick@stwcx.xyz>
Cc: "Patrick Williams" <patrick@stwcx.xyz>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Andrew Jeffery" <andrew@aj.id.au>,
	"Joel Stanley" <joel@jms.id.au>,
	qemu-arm@nongnu.org (open list:ASPEED BMCs),
	qemu-devel@nongnu.org (open list:All patches CC here)
Subject: [PATCH] hw/arm/aspeed: increase Bletchley memory size
Date: Thu,  6 Oct 2022 17:52:32 -0500	[thread overview]
Message-ID: <20221006225232.3558794-1-patrick@stwcx.xyz> (raw)

For the PVT-class hardware we have increased the memory size of
this device to 2 GiB.  Adjust the device model accordingly.

Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
---
 hw/arm/aspeed.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 7d2162c6ed..ab5725fff1 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -1344,7 +1344,7 @@ static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
     amc->num_cs    = 2;
     amc->macs_mask = ASPEED_MAC2_ON;
     amc->i2c_init  = bletchley_bmc_i2c_init;
-    mc->default_ram_size = 512 * MiB;
+    mc->default_ram_size = 2 * GiB;
     mc->default_cpus = mc->min_cpus = mc->max_cpus =
         aspeed_soc_num_cpus(amc->soc_name);
 }
-- 
2.35.1



             reply	other threads:[~2022-10-06 22:54 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-06 22:52 Patrick Williams [this message]
2022-10-07  7:28 ` [PATCH] hw/arm/aspeed: increase Bletchley memory size Cédric Le Goater
2022-10-07  8:08   ` Peter Maydell
2022-10-07 11:05 ` [PATCH v2] " Patrick Williams
2022-10-07 13:13   ` Cédric Le Goater

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