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Thu, 13 Oct 2022 14:48:01 -0700 (PDT) Received: from avogadro.local ([2001:b07:6468:f312:1c09:f536:3de6:228c]) by smtp.gmail.com with ESMTPSA id h28-20020a1709070b1c00b00780f6071b5dsm408596ejl.188.2022.10.13.14.48.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Oct 2022 14:48:00 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: paul@nowt.org, richard.henderson@linaro.org Subject: [PATCH 23/35] target/i386: clarify (un)signedness of immediates from 0F3Ah opcodes Date: Thu, 13 Oct 2022 23:46:39 +0200 Message-Id: <20221013214651.672114-24-pbonzini@redhat.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221013214651.672114-1-pbonzini@redhat.com> References: <20221013214651.672114-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Three-byte opcodes from the 0F3Ah area all have an immediate byte which is usually unsigned. Clarify in the helper code that it is unsigned; the new decoder treats immediates as signed by default, and seeing an intN_t in the prototype might give the wrong impression that one can use decode->immediate directly. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/ops_sse.h | 8 ++++---- target/i386/ops_sse_header.h | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h index 090ba013b3..e7830ff277 100644 --- a/target/i386/ops_sse.h +++ b/target/i386/ops_sse.h @@ -1605,17 +1605,17 @@ SSE_HELPER_W(helper_psignw, FSIGNW) SSE_HELPER_L(helper_psignd, FSIGNL) void glue(helper_palignr, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s, - int32_t shift) + uint32_t imm) { int i; /* XXX could be checked during translation */ - if (shift >= (SHIFT ? 32 : 16)) { + if (imm >= (SHIFT ? 32 : 16)) { for (i = 0; i < (1 << SHIFT); i++) { d->Q(i) = 0; } } else { - shift <<= 3; + int shift = imm * 8; #define SHR(v, i) (i < 64 && i > -64 ? i > 0 ? v >> (i) : (v << -(i)) : 0) #if SHIFT == 0 d->Q(0) = SHR(s->Q(0), shift - 0) | @@ -2093,7 +2093,7 @@ static inline int pcmp_val(Reg *r, uint8_t ctrl, int i) } static inline unsigned pcmpxstrx(CPUX86State *env, Reg *d, Reg *s, - int8_t ctrl, int valids, int validd) + uint8_t ctrl, int valids, int validd) { unsigned int res = 0; int v; diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h index 440f1c0e78..98178be148 100644 --- a/target/i386/ops_sse_header.h +++ b/target/i386/ops_sse_header.h @@ -335,7 +335,7 @@ DEF_HELPER_4(glue(pshufb, SUFFIX), void, env, Reg, Reg, Reg) DEF_HELPER_4(glue(psignb, SUFFIX), void, env, Reg, Reg, Reg) DEF_HELPER_4(glue(psignw, SUFFIX), void, env, Reg, Reg, Reg) DEF_HELPER_4(glue(psignd, SUFFIX), void, env, Reg, Reg, Reg) -DEF_HELPER_5(glue(palignr, SUFFIX), void, env, Reg, Reg, Reg, s32) +DEF_HELPER_5(glue(palignr, SUFFIX), void, env, Reg, Reg, Reg, i32) /* SSE4.1 op helpers */ #if SHIFT >= 1 -- 2.37.3