qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, stefanha@redhat.com,
	"BALATON Zoltan" <balaton@eik.bme.hu>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Daniel Henrique Barboza" <danielhb413@gmail.com>
Subject: [PULL 04/38] ppc4xx: Introduce Ppc4xxSdramBank struct
Date: Mon, 17 Oct 2022 16:19:35 -0300	[thread overview]
Message-ID: <20221017192009.92404-5-danielhb413@gmail.com> (raw)
In-Reply-To: <20221017192009.92404-1-danielhb413@gmail.com>

From: BALATON Zoltan <balaton@eik.bme.hu>

Instead of storing sdram bank parameters in unrelated arrays put them
in a struct so it's clear they belong to the same bank and simplify
the state struct using this bank type.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <5eb82d0424c584b2b9e6f7bc51560f8189ed21bb.1664021647.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
 hw/ppc/ppc440_uc.c      | 49 +++++++++++++++++-----------------
 hw/ppc/ppc4xx_devs.c    | 59 ++++++++++++++++++++---------------------
 include/hw/ppc/ppc4xx.h |  8 ++++++
 3 files changed, 61 insertions(+), 55 deletions(-)

diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index 53e981ddf4..db33334e29 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -16,7 +16,7 @@
 #include "qemu/module.h"
 #include "hw/irq.h"
 #include "exec/memory.h"
-#include "hw/ppc/ppc.h"
+#include "hw/ppc/ppc4xx.h"
 #include "hw/qdev-properties.h"
 #include "hw/pci/pci.h"
 #include "sysemu/block-backend.h"
@@ -485,11 +485,7 @@ void ppc4xx_sdr_init(CPUPPCState *env)
 typedef struct ppc440_sdram_t {
     uint32_t addr;
     int nbanks;
-    MemoryRegion containers[4]; /* used for clipping */
-    MemoryRegion *ram_memories;
-    hwaddr ram_bases[4];
-    hwaddr ram_sizes[4];
-    uint32_t bcr[4];
+    Ppc4xxSdramBank bank[4];
 } ppc440_sdram_t;
 
 enum {
@@ -570,23 +566,23 @@ static uint64_t sdram_size(uint32_t bcr)
 static void sdram_set_bcr(ppc440_sdram_t *sdram, int i,
                           uint32_t bcr, int enabled)
 {
-    if (sdram->bcr[i] & 1) {
+    if (sdram->bank[i].bcr & 1) {
         /* First unmap RAM if enabled */
         memory_region_del_subregion(get_system_memory(),
-                                    &sdram->containers[i]);
-        memory_region_del_subregion(&sdram->containers[i],
-                                    &sdram->ram_memories[i]);
-        object_unparent(OBJECT(&sdram->containers[i]));
+                                    &sdram->bank[i].container);
+        memory_region_del_subregion(&sdram->bank[i].container,
+                                    &sdram->bank[i].ram);
+        object_unparent(OBJECT(&sdram->bank[i].container));
     }
-    sdram->bcr[i] = bcr & 0xffe0ffc1;
+    sdram->bank[i].bcr = bcr & 0xffe0ffc1;
     if (enabled && (bcr & 1)) {
-        memory_region_init(&sdram->containers[i], NULL, "sdram-containers",
+        memory_region_init(&sdram->bank[i].container, NULL, "sdram-container",
                            sdram_size(bcr));
-        memory_region_add_subregion(&sdram->containers[i], 0,
-                                    &sdram->ram_memories[i]);
+        memory_region_add_subregion(&sdram->bank[i].container, 0,
+                                    &sdram->bank[i].ram);
         memory_region_add_subregion(get_system_memory(),
                                     sdram_base(bcr),
-                                    &sdram->containers[i]);
+                                    &sdram->bank[i].container);
     }
 }
 
@@ -595,9 +591,9 @@ static void sdram_map_bcr(ppc440_sdram_t *sdram)
     int i;
 
     for (i = 0; i < sdram->nbanks; i++) {
-        if (sdram->ram_sizes[i] != 0) {
-            sdram_set_bcr(sdram, i, sdram_bcr(sdram->ram_bases[i],
-                                              sdram->ram_sizes[i]), 1);
+        if (sdram->bank[i].size != 0) {
+            sdram_set_bcr(sdram, i, sdram_bcr(sdram->bank[i].base,
+                                              sdram->bank[i].size), 1);
         } else {
             sdram_set_bcr(sdram, i, 0, 0);
         }
@@ -614,9 +610,9 @@ static uint32_t dcr_read_sdram(void *opaque, int dcrn)
     case SDRAM_R1BAS:
     case SDRAM_R2BAS:
     case SDRAM_R3BAS:
-        if (sdram->ram_sizes[dcrn - SDRAM_R0BAS]) {
-            ret = sdram_bcr(sdram->ram_bases[dcrn - SDRAM_R0BAS],
-                            sdram->ram_sizes[dcrn - SDRAM_R0BAS]);
+        if (sdram->bank[dcrn - SDRAM_R0BAS].size) {
+            ret = sdram_bcr(sdram->bank[dcrn - SDRAM_R0BAS].base,
+                            sdram->bank[dcrn - SDRAM_R0BAS].size);
         }
         break;
     case SDRAM_CONF1HB:
@@ -701,12 +697,15 @@ void ppc440_sdram_init(CPUPPCState *env, int nbanks,
                        int do_init)
 {
     ppc440_sdram_t *sdram;
+    int i;
 
     sdram = g_malloc0(sizeof(*sdram));
     sdram->nbanks = nbanks;
-    sdram->ram_memories = ram_memories;
-    memcpy(sdram->ram_bases, ram_bases, nbanks * sizeof(hwaddr));
-    memcpy(sdram->ram_sizes, ram_sizes, nbanks * sizeof(hwaddr));
+    for (i = 0; i < nbanks; i++) {
+        sdram->bank[i].ram = ram_memories[i];
+        sdram->bank[i].base = ram_bases[i];
+        sdram->bank[i].size = ram_sizes[i];
+    }
     qemu_register_reset(&sdram_reset, sdram);
     ppc_dcr_register(env, SDRAM0_CFGADDR,
                      sdram, &dcr_read_sdram, &dcr_write_sdram);
diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c
index b4cd10f735..1226ec4aa9 100644
--- a/hw/ppc/ppc4xx_devs.c
+++ b/hw/ppc/ppc4xx_devs.c
@@ -42,10 +42,7 @@ typedef struct ppc4xx_sdram_t ppc4xx_sdram_t;
 struct ppc4xx_sdram_t {
     uint32_t addr;
     int nbanks;
-    MemoryRegion containers[4]; /* used for clipping */
-    MemoryRegion *ram_memories;
-    hwaddr ram_bases[4];
-    hwaddr ram_sizes[4];
+    Ppc4xxSdramBank bank[4];
     uint32_t besr0;
     uint32_t besr1;
     uint32_t bear;
@@ -53,7 +50,6 @@ struct ppc4xx_sdram_t {
     uint32_t status;
     uint32_t rtr;
     uint32_t pmit;
-    uint32_t bcr[4];
     uint32_t tr;
     uint32_t ecccfg;
     uint32_t eccesr;
@@ -131,26 +127,26 @@ static target_ulong sdram_size(uint32_t bcr)
 static void sdram_set_bcr(ppc4xx_sdram_t *sdram, int i,
                           uint32_t bcr, int enabled)
 {
-    if (sdram->bcr[i] & 0x00000001) {
+    if (sdram->bank[i].bcr & 0x00000001) {
         /* Unmap RAM */
-        trace_ppc4xx_sdram_unmap(sdram_base(sdram->bcr[i]),
-                                 sdram_size(sdram->bcr[i]));
+        trace_ppc4xx_sdram_unmap(sdram_base(sdram->bank[i].bcr),
+                                 sdram_size(sdram->bank[i].bcr));
         memory_region_del_subregion(get_system_memory(),
-                                    &sdram->containers[i]);
-        memory_region_del_subregion(&sdram->containers[i],
-                                    &sdram->ram_memories[i]);
-        object_unparent(OBJECT(&sdram->containers[i]));
+                                    &sdram->bank[i].container);
+        memory_region_del_subregion(&sdram->bank[i].container,
+                                    &sdram->bank[i].ram);
+        object_unparent(OBJECT(&sdram->bank[i].container));
     }
-    sdram->bcr[i] = bcr & 0xFFDEE001;
+    sdram->bank[i].bcr = bcr & 0xFFDEE001;
     if (enabled && (bcr & 0x00000001)) {
         trace_ppc4xx_sdram_map(sdram_base(bcr), sdram_size(bcr));
-        memory_region_init(&sdram->containers[i], NULL, "sdram-containers",
+        memory_region_init(&sdram->bank[i].container, NULL, "sdram-container",
                            sdram_size(bcr));
-        memory_region_add_subregion(&sdram->containers[i], 0,
-                                    &sdram->ram_memories[i]);
+        memory_region_add_subregion(&sdram->bank[i].container, 0,
+                                    &sdram->bank[i].ram);
         memory_region_add_subregion(get_system_memory(),
                                     sdram_base(bcr),
-                                    &sdram->containers[i]);
+                                    &sdram->bank[i].container);
     }
 }
 
@@ -159,9 +155,9 @@ static void sdram_map_bcr(ppc4xx_sdram_t *sdram)
     int i;
 
     for (i = 0; i < sdram->nbanks; i++) {
-        if (sdram->ram_sizes[i] != 0) {
-            sdram_set_bcr(sdram, i, sdram_bcr(sdram->ram_bases[i],
-                                              sdram->ram_sizes[i]), 1);
+        if (sdram->bank[i].size != 0) {
+            sdram_set_bcr(sdram, i, sdram_bcr(sdram->bank[i].base,
+                                              sdram->bank[i].size), 1);
         } else {
             sdram_set_bcr(sdram, i, 0x00000000, 0);
         }
@@ -173,10 +169,10 @@ static void sdram_unmap_bcr(ppc4xx_sdram_t *sdram)
     int i;
 
     for (i = 0; i < sdram->nbanks; i++) {
-        trace_ppc4xx_sdram_unmap(sdram_base(sdram->bcr[i]),
-                                 sdram_size(sdram->bcr[i]));
+        trace_ppc4xx_sdram_unmap(sdram_base(sdram->bank[i].bcr),
+                                 sdram_size(sdram->bank[i].bcr));
         memory_region_del_subregion(get_system_memory(),
-                                    &sdram->ram_memories[i]);
+                                    &sdram->bank[i].ram);
     }
 }
 
@@ -214,16 +210,16 @@ static uint32_t dcr_read_sdram(void *opaque, int dcrn)
             ret = sdram->pmit;
             break;
         case 0x40: /* SDRAM_B0CR */
-            ret = sdram->bcr[0];
+            ret = sdram->bank[0].bcr;
             break;
         case 0x44: /* SDRAM_B1CR */
-            ret = sdram->bcr[1];
+            ret = sdram->bank[1].bcr;
             break;
         case 0x48: /* SDRAM_B2CR */
-            ret = sdram->bcr[2];
+            ret = sdram->bank[2].bcr;
             break;
         case 0x4C: /* SDRAM_B3CR */
-            ret = sdram->bcr[3];
+            ret = sdram->bank[3].bcr;
             break;
         case 0x80: /* SDRAM_TR */
             ret = -1; /* ? */
@@ -358,13 +354,16 @@ void ppc4xx_sdram_init(CPUPPCState *env, qemu_irq irq, int nbanks,
                        int do_init)
 {
     ppc4xx_sdram_t *sdram;
+    int i;
 
     sdram = g_new0(ppc4xx_sdram_t, 1);
     sdram->irq = irq;
     sdram->nbanks = nbanks;
-    sdram->ram_memories = ram_memories;
-    memcpy(sdram->ram_bases, ram_bases, nbanks * sizeof(hwaddr));
-    memcpy(sdram->ram_sizes, ram_sizes, nbanks * sizeof(hwaddr));
+    for (i = 0; i < nbanks; i++) {
+        sdram->bank[i].ram = ram_memories[i];
+        sdram->bank[i].base = ram_bases[i];
+        sdram->bank[i].size = ram_sizes[i];
+    }
     qemu_register_reset(&sdram_reset, sdram);
     ppc_dcr_register(env, SDRAM0_CFGADDR,
                      sdram, &dcr_read_sdram, &dcr_write_sdram);
diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h
index a1781afa8e..2af0d60577 100644
--- a/include/hw/ppc/ppc4xx.h
+++ b/include/hw/ppc/ppc4xx.h
@@ -29,6 +29,14 @@
 #include "exec/memory.h"
 #include "hw/sysbus.h"
 
+typedef struct {
+    MemoryRegion ram;
+    MemoryRegion container; /* used for clipping */
+    hwaddr base;
+    hwaddr size;
+    uint32_t bcr;
+} Ppc4xxSdramBank;
+
 void ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks,
                         MemoryRegion ram_memories[],
                         hwaddr ram_bases[], hwaddr ram_sizes[],
-- 
2.37.3



  parent reply	other threads:[~2022-10-17 19:33 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-17 19:19 [PULL 00/38] ppc queue Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 01/38] MAINTAINERS: step back from PPC Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 02/38] target/ppc: restore powerpc_excp_booke doorbell interrupts Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 03/38] ppc440_bamboo: Remove unnecessary memsets Daniel Henrique Barboza
2022-10-17 19:19 ` Daniel Henrique Barboza [this message]
2022-10-17 19:19 ` [PULL 05/38] ppc4xx_sdram: Get rid of the init RAM hack Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 06/38] ppc4xx: Use Ppc4xxSdramBank in ppc4xx_sdram_banks() Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 07/38] ppc440_bamboo: Add missing 4 MiB valid memory size Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 08/38] ppc4xx_sdram: Move size check to ppc4xx_sdram_init() Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 09/38] ppc4xx_sdram: QOM'ify Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 10/38] ppc4xx_sdram: Drop extra zeros for readability Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 11/38] ppc440_sdram: Split off map/unmap of sdram banks for later reuse Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 12/38] ppc440_sdram: Implement enable bit in the DDR2 SDRAM controller Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 13/38] ppc440_sdram: Get rid of the init RAM hack Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 14/38] ppc440_sdram: Rename local variable for readability Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 15/38] ppc4xx_sdram: Rename functions to prevent name clashes Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 16/38] ppc440_sdram: Move RAM size check to ppc440_sdram_init Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 17/38] ppc440_sdram: QOM'ify Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 18/38] ppc440_uc.c: Move some macros to ppc4xx.h Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 19/38] ppc440_uc.c: Remove unneeded parenthesis Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 20/38] hw/ppc/meson: Allow e500 boards to be enabled separately Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 21/38] hw/gpio/meson: Introduce dedicated config switch for hw/gpio/mpc8xxx Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 22/38] docs/system/ppc/ppce500: Add heading for networking chapter Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 23/38] hw/ppc/e500: Reduce usage of sysbus API Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 24/38] hw/ppc/mpc8544ds: Rename wrongly named method Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 25/38] hw/ppc/mpc8544ds: Add platform bus Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 26/38] hw/ppc/e500: Remove if statement which is now always true Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 27/38] target/ppc: Fix xvcmp* clearing FI bit Daniel Henrique Barboza
2022-10-17 19:19 ` [PULL 28/38] hw/ppc/spapr_pci.c: Use device_cold_reset() rather than device_legacy_reset() Daniel Henrique Barboza
2022-10-17 19:20 ` [PULL 29/38] qmp/hmp, device_tree.c: introduce dumpdtb Daniel Henrique Barboza
2022-10-17 19:20 ` [PULL 30/38] hw/nios2: set machine->fdt in nios2_load_dtb() Daniel Henrique Barboza
2022-10-17 19:20 ` [PULL 31/38] hw/ppc: set machine->fdt in bamboo_load_device_tree() Daniel Henrique Barboza
2022-10-17 19:20 ` [PULL 32/38] hw/ppc: set machine->fdt in sam460ex_load_device_tree() Daniel Henrique Barboza
2022-10-17 19:20 ` [PULL 33/38] hw/ppc: set machine->fdt in xilinx_load_device_tree() Daniel Henrique Barboza
2022-10-17 19:20 ` [PULL 34/38] hw/ppc: set machine->fdt in pegasos2_machine_reset() Daniel Henrique Barboza
2022-10-17 19:20 ` [PULL 35/38] hw/ppc: set machine->fdt in pnv_reset() Daniel Henrique Barboza
2022-10-17 19:20 ` [PULL 36/38] hw/ppc: set machine->fdt in spapr machine Daniel Henrique Barboza
2022-10-17 19:20 ` [PULL 37/38] hw/riscv: set machine->fdt in sifive_u_machine_init() Daniel Henrique Barboza
2022-10-17 19:20 ` [PULL 38/38] hw/riscv: set machine->fdt in spike_board_init() Daniel Henrique Barboza
2022-10-18 20:01 ` [PULL 00/38] ppc queue Stefan Hajnoczi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20221017192009.92404-5-danielhb413@gmail.com \
    --to=danielhb413@gmail.com \
    --cc=balaton@eik.bme.hu \
    --cc=f4bug@amsat.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=stefanha@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).