From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PATCH 06/31] tcg: Remove TCG_TARGET_STACK_GROWSUP
Date: Thu, 20 Oct 2022 21:52:17 +1000 [thread overview]
Message-ID: <20221020115242.2301066-7-richard.henderson@linaro.org> (raw)
In-Reply-To: <20221020115242.2301066-1-richard.henderson@linaro.org>
The hppa host code has been removed since 2013; this
should have been deleted at the same time.
Fixes: 802b5081233a ("tcg-hppa: Remove tcg backend")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/aarch64/tcg-target.h | 1 -
tcg/arm/tcg-target.h | 1 -
tcg/tcg.c | 32 ++------------------------------
3 files changed, 2 insertions(+), 32 deletions(-)
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index 485f685bd2..e145d50fef 100644
--- a/tcg/aarch64/tcg-target.h
+++ b/tcg/aarch64/tcg-target.h
@@ -16,7 +16,6 @@
#define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 24
#define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB)
-#undef TCG_TARGET_STACK_GROWSUP
typedef enum {
TCG_REG_X0, TCG_REG_X1, TCG_REG_X2, TCG_REG_X3,
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 7e96495392..56c1ac4586 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -30,7 +30,6 @@ extern int arm_arch;
#define use_armv7_instructions (__ARM_ARCH >= 7 || arm_arch >= 7)
-#undef TCG_TARGET_STACK_GROWSUP
#define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
#define MAX_CODE_GEN_BUFFER_SIZE UINT32_MAX
diff --git a/tcg/tcg.c b/tcg/tcg.c
index e9ff3c92e5..6c4f949c85 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1551,25 +1551,8 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args)
}
if (TCG_TARGET_REG_BITS < 64 && is_64bit) {
- /*
- * If stack grows up, then we will be placing successive
- * arguments at lower addresses, which means we need to
- * reverse the order compared to how we would normally
- * treat either big or little-endian. For those arguments
- * that will wind up in registers, this still works for
- * HPPA (the only current STACK_GROWSUP target) since the
- * argument registers are *also* allocated in decreasing
- * order. If another such target is added, this logic may
- * have to get more complicated to differentiate between
- * stack arguments and register arguments.
- */
-#if HOST_BIG_ENDIAN != defined(TCG_TARGET_STACK_GROWSUP)
- op->args[pi++] = temp_arg(args[i] + 1);
- op->args[pi++] = temp_arg(args[i]);
-#else
- op->args[pi++] = temp_arg(args[i]);
- op->args[pi++] = temp_arg(args[i] + 1);
-#endif
+ op->args[pi++] = temp_arg(args[i] + HOST_BIG_ENDIAN);
+ op->args[pi++] = temp_arg(args[i] + !HOST_BIG_ENDIAN);
real_args += 2;
continue;
}
@@ -4166,12 +4149,6 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const TCGOp *op)
return true;
}
-#ifdef TCG_TARGET_STACK_GROWSUP
-#define STACK_DIR(x) (-(x))
-#else
-#define STACK_DIR(x) (x)
-#endif
-
static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
{
const int nb_oargs = TCGOP_CALLO(op);
@@ -4211,18 +4188,13 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
stack_offset = TCG_TARGET_CALL_STACK_OFFSET;
for (i = nb_regs; i < nb_iargs; i++) {
arg = op->args[nb_oargs + i];
-#ifdef TCG_TARGET_STACK_GROWSUP
- stack_offset -= sizeof(tcg_target_long);
-#endif
if (arg != TCG_CALL_DUMMY_ARG) {
ts = arg_temp(arg);
temp_load(s, ts, tcg_target_available_regs[ts->type],
s->reserved_regs, 0);
tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset);
}
-#ifndef TCG_TARGET_STACK_GROWSUP
stack_offset += sizeof(tcg_target_long);
-#endif
}
/* assign input registers */
--
2.34.1
next prev parent reply other threads:[~2022-10-20 14:47 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-20 11:52 [PATCH 00/31] tcg: Support for Int128 with helpers Richard Henderson
2022-10-20 11:52 ` [PATCH 01/31] tcg: Tidy tcg_reg_alloc_op Richard Henderson
2022-10-20 11:52 ` [PATCH 02/31] tcg: Introduce paired register allocation Richard Henderson
2022-10-20 11:52 ` [PATCH 03/31] tcg/s390x: Use register pair allocation for div and mulu2 Richard Henderson
2022-10-20 11:52 ` [PATCH 04/31] tcg/arm: Use register pair allocation for qemu_{ld, st}_i64 Richard Henderson
2022-10-20 11:52 ` [PATCH 05/31] meson: Move CONFIG_TCG_INTERPRETER to config_host Richard Henderson
2022-10-20 11:52 ` Richard Henderson [this message]
2022-10-20 15:25 ` [PATCH 06/31] tcg: Remove TCG_TARGET_STACK_GROWSUP Philippe Mathieu-Daudé
2022-10-20 11:52 ` [PATCH 07/31] accel/tcg: Set cflags_next_tb in cpu_common_initfn Richard Henderson
2022-10-20 11:52 ` [PATCH 08/31] target/sparc: Avoid TCGV_{LOW,HIGH} Richard Henderson
2022-10-20 11:52 ` [PATCH 09/31] tcg: Move TCG_{LOW,HIGH} to tcg-internal.h Richard Henderson
2022-10-20 14:52 ` Philippe Mathieu-Daudé
2022-10-20 11:52 ` [PATCH 10/31] tcg: Add temp_subindex to TCGTemp Richard Henderson
2022-10-20 14:57 ` Philippe Mathieu-Daudé
2022-10-20 11:52 ` [PATCH 11/31] tcg: Allocate TCGTemp pairs in host memory order Richard Henderson
2022-10-20 15:01 ` Philippe Mathieu-Daudé
2022-10-20 21:33 ` Richard Henderson
2022-10-20 11:52 ` [PATCH 12/31] tcg: Move TCG_TYPE_COUNT outside enum Richard Henderson
2022-10-20 15:03 ` Philippe Mathieu-Daudé
2022-10-20 11:52 ` [PATCH 13/31] tcg: Introduce tcg_type_size Richard Henderson
2022-10-20 11:52 ` [PATCH 14/31] tcg: Introduce TCGCallReturnKind and TCGCallArgumentKind Richard Henderson
2022-10-20 11:52 ` [PATCH 15/31] tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64 Richard Henderson
2022-10-20 15:12 ` Philippe Mathieu-Daudé
2022-10-20 21:39 ` Richard Henderson
2022-10-20 11:52 ` [PATCH 16/31] tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32 Richard Henderson
2022-10-20 11:52 ` [PATCH 17/31] tcg: Use TCG_CALL_ARG_EVEN for TCI special case Richard Henderson
2022-10-20 11:52 ` [PATCH 18/31] tcg: Reorg function calls Richard Henderson
2022-10-20 11:52 ` [PATCH 19/31] tcg: Move ffi_cif pointer into TCGHelperInfo Richard Henderson
2022-10-20 11:52 ` [PATCH 20/31] tcg: Add TCGHelperInfo argument to tcg_out_call Richard Henderson
2022-10-20 15:41 ` Philippe Mathieu-Daudé
2022-10-20 11:52 ` [PATCH 21/31] tcg: Define TCG_TYPE_I128 and related helper macros Richard Henderson
2022-10-20 11:52 ` [PATCH 22/31] tcg: Add TCG_CALL_{RET,ARG}_NORMAL_4 Richard Henderson
2022-10-20 11:52 ` [PATCH 23/31] tcg: Allocate objects contiguously in temp_allocate_frame Richard Henderson
2022-10-20 11:52 ` [PATCH 24/31] tcg: Introduce tcg_out_addi_ptr Richard Henderson
2022-10-20 11:52 ` [PATCH 25/31] tcg: Add TCG_CALL_{RET,ARG}_BY_REF Richard Henderson
2022-10-20 11:52 ` [PATCH 26/31] tcg: Introduce tcg_target_call_oarg_reg Richard Henderson
2022-10-20 11:52 ` [PATCH 27/31] tcg: Add TCG_CALL_RET_BY_VEC Richard Henderson
2022-10-20 11:52 ` [PATCH 28/31] include/qemu/int128: Use Int128 structure for TCI Richard Henderson
2022-10-20 11:52 ` [PATCH 29/31] tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128 Richard Henderson
2022-10-20 11:52 ` [PATCH 30/31] tcg: Add temp allocation for TCGv_i128 Richard Henderson
2022-10-20 11:52 ` [PATCH 31/31] tcg: Add tcg_gen_extr_i128_i64, tcg_gen_concat_i64_i128 Richard Henderson
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