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From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Eduardo Habkost" <eduardo@habkost.net>,
	"Hervé Poussineau" <hpoussin@reactos.org>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Gerd Hoffmann" <kraxel@redhat.com>,
	"John Snow" <jsnow@redhat.com>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Ani Sinha" <ani@anisinha.ca>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	qemu-block@nongnu.org,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Bernhard Beschow" <shentey@gmail.com>
Subject: [PATCH v2 39/43] hw/isa/piix: Rename functions to be shared for interrupt triggering
Date: Sat, 22 Oct 2022 17:05:04 +0200	[thread overview]
Message-ID: <20221022150508.26830-40-shentey@gmail.com> (raw)
In-Reply-To: <20221022150508.26830-1-shentey@gmail.com>

PIIX4 will get the same optimizations which are already implemented for
PIIX3.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/isa/piix.c | 56 +++++++++++++++++++++++++--------------------------
 1 file changed, 28 insertions(+), 28 deletions(-)

diff --git a/hw/isa/piix.c b/hw/isa/piix.c
index 9e7b11bcdd..446105a7a1 100644
--- a/hw/isa/piix.c
+++ b/hw/isa/piix.c
@@ -41,47 +41,47 @@
 
 #define XEN_PIIX_NUM_PIRQS      128ULL
 
-static void piix3_set_irq_pic(PIIXState *piix3, int pic_irq)
+static void piix_set_irq_pic(PIIXState *piix, int pic_irq)
 {
-    qemu_set_irq(piix3->pic.in_irqs[pic_irq],
-                 !!(piix3->pic_levels &
+    qemu_set_irq(piix->pic.in_irqs[pic_irq],
+                 !!(piix->pic_levels &
                     (((1ULL << PIIX_NUM_PIRQS) - 1) <<
                      (pic_irq * PIIX_NUM_PIRQS))));
 }
 
-static void piix3_set_irq_level_internal(PIIXState *piix3, int pirq, int level)
+static void piix_set_irq_level_internal(PIIXState *piix, int pirq, int level)
 {
     int pic_irq;
     uint64_t mask;
 
-    pic_irq = piix3->dev.config[PIIX_PIRQCA + pirq];
+    pic_irq = piix->dev.config[PIIX_PIRQCA + pirq];
     if (pic_irq >= ISA_NUM_IRQS) {
         return;
     }
 
     mask = 1ULL << ((pic_irq * PIIX_NUM_PIRQS) + pirq);
-    piix3->pic_levels &= ~mask;
-    piix3->pic_levels |= mask * !!level;
+    piix->pic_levels &= ~mask;
+    piix->pic_levels |= mask * !!level;
 }
 
-static void piix3_set_irq_level(PIIXState *piix3, int pirq, int level)
+static void piix_set_irq_level(PIIXState *piix, int pirq, int level)
 {
     int pic_irq;
 
-    pic_irq = piix3->dev.config[PIIX_PIRQCA + pirq];
+    pic_irq = piix->dev.config[PIIX_PIRQCA + pirq];
     if (pic_irq >= ISA_NUM_IRQS) {
         return;
     }
 
-    piix3_set_irq_level_internal(piix3, pirq, level);
+    piix_set_irq_level_internal(piix, pirq, level);
 
-    piix3_set_irq_pic(piix3, pic_irq);
+    piix_set_irq_pic(piix, pic_irq);
 }
 
-static void piix3_set_irq(void *opaque, int pirq, int level)
+static void piix_set_irq(void *opaque, int pirq, int level)
 {
-    PIIXState *piix3 = opaque;
-    piix3_set_irq_level(piix3, pirq, level);
+    PIIXState *piix = opaque;
+    piix_set_irq_level(piix, pirq, level);
 }
 
 static void piix4_set_irq(void *opaque, int irq_num, int level)
@@ -158,29 +158,29 @@ static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin)
 }
 
 /* irq routing is changed. so rebuild bitmap */
-static void piix3_update_irq_levels(PIIXState *piix3)
+static void piix_update_irq_levels(PIIXState *piix)
 {
-    PCIBus *bus = pci_get_bus(&piix3->dev);
+    PCIBus *bus = pci_get_bus(&piix->dev);
     int pirq;
 
-    piix3->pic_levels = 0;
+    piix->pic_levels = 0;
     for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) {
-        piix3_set_irq_level(piix3, pirq, pci_bus_get_irq_level(bus, pirq));
+        piix_set_irq_level(piix, pirq, pci_bus_get_irq_level(bus, pirq));
     }
 }
 
-static void piix3_write_config(PCIDevice *dev,
-                               uint32_t address, uint32_t val, int len)
+static void piix_write_config(PCIDevice *dev, uint32_t address, uint32_t val,
+                              int len)
 {
     pci_default_write_config(dev, address, val, len);
     if (ranges_overlap(address, len, PIIX_PIRQCA, 4)) {
-        PIIXState *piix3 = PIIX_PCI_DEVICE(dev);
+        PIIXState *piix = PIIX_PCI_DEVICE(dev);
         int pic_irq;
 
-        pci_bus_fire_intx_routing_notifier(pci_get_bus(&piix3->dev));
-        piix3_update_irq_levels(piix3);
+        pci_bus_fire_intx_routing_notifier(pci_get_bus(&piix->dev));
+        piix_update_irq_levels(piix);
         for (pic_irq = 0; pic_irq < ISA_NUM_IRQS; pic_irq++) {
-            piix3_set_irq_pic(piix3, pic_irq);
+            piix_set_irq_pic(piix, pic_irq);
         }
     }
 }
@@ -202,7 +202,7 @@ static void piix3_write_config_xen(PCIDevice *dev,
         }
     }
 
-    piix3_write_config(dev, address, val, len);
+    piix_write_config(dev, address, val, len);
 }
 
 static void piix_reset(DeviceState *dev)
@@ -262,7 +262,7 @@ static int piix3_post_load(void *opaque, int version_id)
      */
     piix3->pic_levels = 0;
     for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) {
-        piix3_set_irq_level_internal(piix3, pirq,
+        piix_set_irq_level_internal(piix3, pirq,
             pci_bus_get_irq_level(pci_get_bus(&piix3->dev), pirq));
     }
     return 0;
@@ -512,7 +512,7 @@ static void piix3_realize(PCIDevice *dev, Error **errp)
         return;
     }
 
-    pci_bus_irqs(pci_bus, piix3_set_irq, piix3_pci_slot_get_pirq,
+    pci_bus_irqs(pci_bus, piix_set_irq, piix3_pci_slot_get_pirq,
                  piix3, PIIX_NUM_PIRQS);
     pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq);
 }
@@ -521,7 +521,7 @@ static void piix3_class_init(ObjectClass *klass, void *data)
 {
     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 
-    k->config_write = piix3_write_config;
+    k->config_write = piix_write_config;
     k->realize = piix3_realize;
 }
 
-- 
2.38.1



  parent reply	other threads:[~2022-10-24  3:30 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-22 15:04 [PATCH v2 00/43] Consolidate PIIX south bridges Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 01/43] hw/i386/pc: Create DMA controllers in " Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 02/43] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 03/43] hw/isa/piix3: Remove extra ';' outside of functions Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 04/43] hw/isa/piix3: Add size constraints to rcr_ops Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 05/43] hw/isa/piix3: Modernize reset handling Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 06/43] hw/isa/piix3: Prefer pci_address_space() over get_system_memory() Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 07/43] hw/isa/piix4: Rename wrongly named method Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 08/43] hw/ide/piix: Introduce TYPE_ macros for PIIX IDE controllers Bernhard Beschow
2022-10-25 23:30   ` Philippe Mathieu-Daudé
2022-10-22 15:04 ` [PATCH v2 09/43] hw/usb/hcd-uhci: Introduce TYPE_ defines for device models Bernhard Beschow
2022-10-27 20:57   ` Philippe Mathieu-Daudé
2022-10-22 15:04 ` [PATCH v2 10/43] hw/i386/pc: Create RTC controllers in south bridges Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 11/43] hw/i386/pc: No need for rtc_state to be an out-parameter Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 12/43] hw/isa/piix3: Create USB controller in host device Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 13/43] hw/isa/piix3: Create power management " Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 14/43] hw/intc/i8259: Introduce i8259 proxy "isa-pic" Bernhard Beschow
2022-10-24  7:35   ` Philippe Mathieu-Daudé
2022-10-26 19:56     ` B
2022-10-22 15:04 ` [PATCH v2 15/43] hw/isa/piix3: Create ISA PIC in host device Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 16/43] hw/isa/piix3: Create IDE controller " Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 17/43] hw/isa/piix3: Wire up ACPI interrupt internally Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 18/43] hw/isa/piix3: Remove unused include Bernhard Beschow
2022-10-23 21:05   ` Philippe Mathieu-Daudé
2022-10-22 15:04 ` [PATCH v2 19/43] hw/isa/piix3: Allow board to provide PCI interrupt routes Bernhard Beschow
2022-10-24  5:12   ` Philippe Mathieu-Daudé
2022-10-25 23:34   ` Philippe Mathieu-Daudé
2022-10-26  9:45     ` Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 20/43] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 21/43] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4 Bernhard Beschow
2022-10-24  5:08   ` Philippe Mathieu-Daudé
2022-10-22 15:04 ` [PATCH v2 22/43] hw/isa/piix3: Rename piix3_reset() " Bernhard Beschow
2022-10-24  5:08   ` Philippe Mathieu-Daudé
2022-10-22 15:04 ` [PATCH v2 23/43] hw/isa/piix3: Prefix pci_slot_get_pirq() with "piix3_" Bernhard Beschow
2022-10-24  5:07   ` Philippe Mathieu-Daudé
2022-10-22 15:04 ` [PATCH v2 24/43] hw/isa/piix3: Rename typedef PIIX3State to PIIXState Bernhard Beschow
2022-10-24  5:07   ` Philippe Mathieu-Daudé
2022-10-22 15:04 ` [PATCH v2 25/43] hw/mips/malta: Reuse dev variable Bernhard Beschow
2022-10-24  5:07   ` Philippe Mathieu-Daudé
2022-10-22 15:04 ` [PATCH v2 26/43] meson: Fix dependencies of piix4 southbridge Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 27/43] hw/isa/piix4: Add missing initialization Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 28/43] hw/isa/piix4: Move pci_ide_create_devs() call to board code Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 29/43] hw/isa/piix4: Make PIIX4's ACPI and USB functions optional Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 30/43] hw/isa/piix4: Allow board to provide PCI interrupt routes Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 31/43] hw/isa/piix4: Remove unused code Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 32/43] hw/isa/piix4: Use ISA PIC device Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 33/43] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Bernhard Beschow
2022-10-22 15:04 ` [PATCH v2 34/43] hw/isa/piix4: Rename reset control operations to match PIIX3 Bernhard Beschow
2022-10-24  5:20   ` Philippe Mathieu-Daudé
2022-10-22 15:05 ` [PATCH v2 35/43] hw/isa/piix4: Prefix pci_slot_get_pirq() with "piix4_" Bernhard Beschow
2022-10-22 15:05 ` [PATCH v2 36/43] hw/isa/piix3: Merge hw/isa/piix4.c Bernhard Beschow
2022-10-22 15:05 ` [PATCH v2 37/43] hw/isa/piix: Harmonize names of reset control memory regions Bernhard Beschow
2022-10-24  5:21   ` Philippe Mathieu-Daudé
2022-10-22 15:05 ` [PATCH v2 38/43] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Bernhard Beschow
2022-10-22 15:05 ` Bernhard Beschow [this message]
2022-10-22 15:05 ` [PATCH v2 40/43] hw/isa/piix: Consolidate IRQ triggering Bernhard Beschow
2022-10-22 15:05 ` [PATCH v2 41/43] hw/isa/piix: Share PIIX3 base class with PIIX4 Bernhard Beschow
2022-10-22 15:05 ` [PATCH v2 42/43] hw/isa/piix: Drop the "3" from the PIIX base class Bernhard Beschow
2022-10-22 15:05 ` [PATCH v2 43/43] hw/i386/acpi-build: Resolve PIIX ISA bridge rather than ACPI controller Bernhard Beschow

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